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AD7477ARTZ-REEL3 データシート(PDF) 10 Page - Analog Devices |
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AD7477ARTZ-REEL3 データシート(HTML) 10 Page - Analog Devices |
10 / 24 page AD7476/AD7477/AD7478 Rev. F | Page 10 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 VDD 6 CS 2 GND 5 SDATA 3 VIN 4 SCLK AD7476/ AD7477/ AD7478 TOP VIEW (Not to Scale) Figure 3. Pin Configuration Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1 VDD Power Supply Input. The VDD range for the AD7476/AD7477/AD7478 is from 2.35 V to 5.25 V. 2 GND Analog Ground. Ground reference point for all circuitry on the part. All analog input signals should be referred to this GND voltage. 3 VIN Analog Input. Single-ended analog input channel. The input range is 0 V to VDD. 4 SCLK Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also used as the clock source for the AD7476/AD7477/AD7478 conversion process. 5 SDATA Data Out. Logic output. The conversion result is provided on this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from the AD7476 consists of four leading zeros followed by the 12 bits of conversion data; this is provided MSB first. The data stream from the AD7477 consists of four leading zeros followed by the 10 bits of conversion data, followed by two trailing zeros, which is also provided MSB first. The data stream from the AD7478 consists of four leading zeros followed by the eight bits of conversion data, followed by four trailing zeros, which is provided MSB first. 6 CS Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the AD7476/AD7477/AD7478 and framing the serial data transfer. |
同様の部品番号 - AD7477ARTZ-REEL3 |
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同様の説明 - AD7477ARTZ-REEL3 |
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