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TSB82AA2IPGE データシート(PDF) 2 Page - Texas Instruments

部品番号 TSB82AA2IPGE
部品情報  1394b OHCI-Lynx Controller
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
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TSB82AA2IPGE データシート(HTML) 2 Page - Texas Instruments

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TSB82AA2
SLLA221 – JUNE 2006
Due to the high throughput potential of the TSB82AA2 device, it possible to encounter large PCI and legacy
1394 bus latencies, which can cause the 1394 data to be overrun. To overcome this potential problem, the
TSB82AA2 implements deep transmit and receive FIFOs to buffer the 1394 data, thus preventing possible
problems due to bus latency. This also ensures that the device can transmit and receive sustained maximum
size isochronous or asynchronous data payloads at S800.
The TSB82AA2 device implements other performance enhancements to improve overall performance of the
device, such as: a highly tuned physical data path for enhanced SBP-2 performance, physical post writing
buffers, multiple isochronous contexts, and advanced internal arbitration.
The TSB82AA2 device also implements hardware enhancements to better support digital video (DV) and MPEG
data stream reception and transmission. These enhancements are enabled through the isochronous receive
digital video enhancements register at TI extension offset A80h. These enhancements include automatic time
stamp insertion for transmitted DV and MPEG-formatted streams and common isochronous packet (CIP) header
stripping for received DV streams.
The CIP format is defined by the IEC 61883-1:1998 specification. The enhancements to the isochronous data
contexts are implemented as hardware support for the synchronization timestamp for both DV and audio/video
CIP formats. The TSB82AA2 device supports modification of the synchronization timestamp field to ensure that
the value inserted via software is not stale—that is, less than the current cycle timer when the packet is
transmitted.
The TSB82AA2 performance and enhanced throughput make it an excellent choice for today’s 1394 PC market;
however, the portable, mobile, and even today’s desktop PCs power management schemes continue to require
devices to use less and less power, and Texas Instrument’s 1394 OHCI-Lynx product line has continued to raise
the bar by providing the lowest power 1394 link-layers in the industry. The TSB82AA2 device represents the
next evolution of Texas Instruments commitment to meet the challenge of power-sensitive applications. The
TSB82AA2 device has ultra-low operational power requirements and intelligent power management capabilities
that allow it to autonomously conserve power based on the device usage.
One of the key elements for reducing the TSB82AA2 operational power requirements is Texas Instrument’s
advanced CMOS process and the implementation of an internal 1.8-V core, which is supplied by an improved
integrated 3.3-V to 1.8-V voltage regulator. The TSB82AA2 device implements a next generation voltage
regulator which is more efficient than its predecessors, thus providing an overall reduction in the device’s
operational power requirements especially when operating in D3
cold using auxiliary power. In fact, the TSB82AA2
device fully supports D0, D1, D2, and D3
hot/cold power states as specified in the PC 2001 Design Guide
requirements and the PCI Power Management Specification. PME wake event support is subject to operating
system support and implementation.
As required by the 1394 Open Host Controller Interface Specification (OHCI) and IEEE Std 1394a–2000, internal
control registers are memory-mapped and nonprefetchable. The PCI configuration header is accessed through
configuration cycles as specified by the PCI Local Bus Specification, and provides plug-and-play (PnP)
compatibility. Furthermore, the TSB82AA2 device is fully compliant with the latest PCI Local Bus Specification,
PCI Bus Power Management Interface Specification, IEEE Draft Std 1394b, IEEE Std 1394a–2000, and 1394
Open Host Controller Interface Specification.
NOTE:
This product is for high-volume PC applications only. For a complete datasheet or
more information contact support@ti.com.
2
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