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LB11873 データシート(PDF) 3 Page - ON Semiconductor |
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LB11873 データシート(HTML) 3 Page - ON Semiconductor |
3 / 14 page LB11873 No.A0081-3/14 Continued from preceding page. Ratings Unit Parameter Symbol Conditions min typ max FGS Pin Output saturation voltage VOL (FGS) IFGS = 7mA 0.15 0.5 V Output leakage current IL (FGS) VO = VCC 10 μA CSD Oscillator Circuit Oscillator frequency f (CSD) C = 0.033 μF 31 Hz High-level output voltage VOH (CSD) 3.50 3.75 4.00 V Low-level output voltage VOL (CSD) 1.00 1.30 1.60 V Amplitude V (CSD) 2.20 2.45 2.80 Vp-p External capacitor charge current ICHG1 VCSD = 2V -7 -5 -3 μA External capacitor discharge current ICHG2 VCSD = 2V 3 5 7 μA Lock detection delay counts CSDCT1 7 Clock disconnected protection counts CSDCT2 2 Constraint protection operation counts CSDCT3 31 Initial reset voltage VRES 0.6 0.8 V Phase Comparator Output High-level input voltage VPDH IOH = -100μA VREG - 0.2 VREG - 0.1 V Low-level input voltage VPDL IOL = 100μA 0.2 0.3 V Input source current IPD+ VPD = VREG/2 -0.5 mA Input sink current IPD- VPD = VREG/2 1.5 mA Phase Lock Detection Output Output saturation voltage VOL (LD) ILD = 10mA 0.15 0.5 V Output leakage current IL (LD) VO = VCC 10 μA Error Amplifier Block Input offset voltage VIO (ER) Design target value* -10 10 mV Input bias current IB (ER) -1 1 μA High-level output voltage VOH (ER) IEI = -0.1mA, no load 3.7 4.0 4.3 V Low-level output voltage VOL (ER) IEI = 0.1mA, no load 0.7 1.0 1.3 V DC bias level VB (ER) -5% VREG/2 5% V Current Llimiter Circuit Drive gain 1 GDF1 In the phase locked state 0.4 0.5 0.6 Times Drive gain 2 GDF2 In the unlocked state 0.8 1.0 1.2 Times Llimiter voltage 1 VRF1 VCC - VM, forward mode 0.45 0.5 0.55 V Llimiter voltage 2 VRF2 VCC - VM, reverse mode 0.225 0.25 0.275 V Thermal shutdown circuit Thermal shutdown operating temperature TSD Design target value* (junction temperature) 150 170 °C Thermal shutdown temperature hysteresis ΔTSD Design target value* (junction temperature) 40 °C Low Voltage Protection Circuit Operating voltage VSDL 8.1 8.45 8.9 V Hysteresis ΔVSD 0.2 0.35 0.5 V CLK pin External input frequency fI (CLK) 0.1 10 kHz High-level input voltage VIH (CLK) 2.0 VREG V Low-level input voltage VIL (CLK) 0 1.0 V Input open voltage VIO (CLK) 3.0 V Hysteresis VIS (CLK) 0.25 V High-level input current IIH (CLK) VCKIN = VREG 115 150 μA Low-level input current IIL (CLK) VCKIN = 0V -220 -175 μA Continued on next page. Note : * The design specification items are design guarantees and are not measured. |
同様の部品番号 - LB11873 |
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同様の説明 - LB11873 |
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