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LM25085SDE データシート(PDF) 11 Page - Texas Instruments

部品番号 LM25085SDE
部品情報  LM25085, LM25085-Q1 42V Constant On-Time PFET Buck Switching Controller
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ホームページ  http://www.ti.com
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RT
Input
Voltage
STOP
RUN
LM25085
RT
VIN
RT =
VOUT x 6 x 10
6
FS
- 8.6
LM25085, LM25085-Q1
www.ti.com
SNVS593H – OCTOBER 2008 – REVISED MARCH 2013
To set a specific continuous conduction mode switching frequency (FS), the RT resistor is determined from the
following:
where
RT is in kΩ
(5)
A simplified version of Equation 5 at VIN = 12V, and tD = 100ns, is:
For VIN = 42V and tD = 100ns, the simplified equation is:
SHUTDOWN
The LM25085 can be shutdown by grounding the RT pin (see Figure 25). In this mode the PFET is held off, and
the VCC regulator is disabled. The internal operating current is reduced to the value shown in Figure 6. The
shutdown threshold at the RT pin is
≊0.73V, with ≊50mV of hysteresis. Releasing the pin enables normal
operation. The RT pin must not be forced high during normal operation.
Figure 25. Shutdown Implementation
CURRENT LIMITING
The LM25085 current limiting operates by sensing the voltage across either the RDS(ON) of Q1, or a sense
resistor, during the on-time and comparing it to the voltage across the resistor RADJ (see Figure 26). The current
limit function is much more accurate and stable over temperature when a sense resistor is used. The RDS(ON) of a
MOSFET has a wide process variation and a large temperature coefficient.
If the voltage across RDS(ON) of Q1, or the sense resistor, is greater than the voltage across RADJ, the current limit
comparator switches to turn off Q1. Current sensing is disabled for a blanking time of
≊100ns at the beginning of
the on-time to prevent false triggering of the current limit comparator due to leading edge current spikes.
Because of the blanking time and the turn-on and turn-off delays created by the PFET, the on-time at the PGATE
pin should not be set less than 150ns. An on-time shorter than that may prevent the current limit detection circuit
from properly detecting an over-current condition. The duration of the subsequent forced off-time is a function of
the input voltage and the voltage at the FB pin, as shown in Figure 10. The longer-than-normal forced off-time
allows the inductor current to decrease to a low level before the next on-time. This cycle-by-cycle monitoring,
followed by a forced off-time, provides effective protection from output load faults over a wide range of operating
conditions.
The voltage across the RADJ resistor is set by an internal 40µA current sink at the ADJ pin. When using Q1’s
RDS(ON) for sensing, the current at which the current limit comparator switches is calculated from:
ICL = 40µA x RADJ/RDS(ON)
(6)
When using a sense resistor (RSEN) the threshold of the current limit comparator is calculated from:
Copyright © 2008–2013, Texas Instruments Incorporated
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Product Folder Links: LM25085 LM25085-Q1


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