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AD744JR データシート(PDF) 7 Page - Analog Devices |
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AD744JR データシート(HTML) 7 Page - Analog Devices |
7 / 12 page REV. C AD744 –7– POWER SUPPLY BYPASSING The power supply connections to the AD744 must maintain a low impedance to ground over a bandwidth of 10 MHz or more. This is especially important when driving a significant resistive or capacitive load, since all current delivered to the load comes from the power supplies. Multiple high quality bypass capacitors are recommended for each power supply line in any critical application. A 0.1 µF ceramic and a 1 µF electrolytic capacitor as shown in Figure 24 placed as close as possible to the ampli- fier (with short lead lengths to power supply common) will assure adequate high frequency bypassing, in most applica- tions. A minimum bypass capacitance of 0.1 µF should be used for any application. AD744 1 F 0.1 F –VS 1 F 0.1 F +VS Figure 24. Recommended Power Supply Bypassing MEASURING AD744 SETTLING TIME The photos of Figures 26 and 27 show the dynamic response of the AD744 while operating in the settling time test circuit of Figure 25. The input of the settling time fixture is driven by a flat-top pulse generator. The error signal output from the false summing node of A1, the AD744 under test, is clamped, ampli- fied by op amp A2 and then clamped again. TO TEKTRONIX 7A26 OSCILLOSCOPE PREAMP INPUT SECTION (VIA LESS THAN 1 FT 50 COAXIAL CABLE) +15V COM –15V +VS –VS 1M 20pF A2 AD3554 10k 5pF 10k 1.1k +VS –VS 0.47 F 0.47 F 2X HP2835 0.2pF – 0.8pF 206 2X HP2835 +VS –VS 1 F 0.1 F 5pF – 18pF 10k AD744 A1 5k 1 F 0.1 F 10pF 4.99k 200 4.99k NULL FLAT-TOP PULSE GENERATOR DATA DYNAMICS 5109 OR EQUIVALENT NOTE: USE CIRCUIT BOARD WITH GROUND PLANE VERROR 10 VIN Figure 25. Settling Time Test Circuit The error signal is thus clamped twice: once to prevent overloading amplifier A2 and then a second time to avoid overloading the oscilloscope preamp. A Tektronix oscilloscope preamp type 7A26 was carefully chosen because it recovers from the approximately 0.4 V overload quickly enough to allow accurate measurement of the AD744’s 500 ns settling time. Amplifier A2 is a very high-speed FET-input op amp; it provides a voltage gain of 10, amplifying the error signal output of the AD744 under test. Figure 26. Settling Characteristics 0 to +10 V Step Upper Trace: Output of AD744 Under Test (5 V/div.) Lower Trace: Amplified Error Voltage (0.01%/div.) Figure 27. Settling Characteristics 0 to –10 V Step Upper Trace: Output of AD744 Under Test (5 V/div.) Lower Trace: Amplified Error Voltage (0.01%/div.) |
同様の部品番号 - AD744JR |
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同様の説明 - AD744JR |
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