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AD744JR データシート(PDF) 11 Page - Analog Devices |
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AD744JR データシート(HTML) 11 Page - Analog Devices |
11 / 12 page REV. C AD744 –11– Table IV. Performance Summary for the 3 Op Amp Instrumentation Amplifier Circuit Gain RG Bandwidth T Settle (0.01%) 1 NC 3.5 MHz 1.5 µs 2 20 k Ω 2.5 MHz 1.0 µs 10 2.22 k Ω 1 MHz 2 µs 100 202 Ω 290 kHz 5 µs Figure 37. The Pulse Response of the 3 Op Amp Instrumentation Amplifier. Gain = 1, l Horizontal Scale: 0.5 µV/div., Vertical Scale: 5 V/div. (Gain= 10) Figure 38. Settling Time of the 3 Op Amp Instrumentation Amplifier. Horizontal Scale: 500 ns/div., Vertical Scale, Pulse Input: 5 V/div., Output Settling: 1 mV/div. Minimizing Settling Time in Real-World Applications An amplifier with a “single pole” or “ideal” integrator open-loop frequency response will achieve the minimum possible settling time for any given unity-gain bandwidth. However, when this “ideal” amplifier is used in a practical circuit, the actual settling time is increased above the minimum value because of added time constants which are introduced due to additional capacitance on the amplifier’s summing junction. The following discussion will explain how to minimize this increase in settling time by the selection of the proper value for feedback capacitor, CL. If an op amp is modeled as an ideal integrator with a unity gain crossover frequency, fO, Equation 1 will accurately describe the small signal behavior of the circuit of Figure 39. This circuit models an op amp connected as an I-to-V converter. Equation 1 would completely describe the output of the system if not for the op amp’s finite slew rate and other nonlinear effects. Even considering these effects, the fine scale settling to <0.1% will be determined by the op amp’s small signal behav- ior. Equation 1. V O I IN = – R RC L + CX () 2 πF O s 2 + G N 2 πF O + RC L s +1 Where FO = the op amp’s unity gain crossover frequency G N = the “noise ” gain of the circuit 1 + R R O This Equation May Then Be Solved for CL: Equation 2. C L = 2 − G N R 2 πF O + 2 RC X 2πFO + 1 − GN () R 2 πF O In these equations, capacitance CX is the total capacitance appear- ing at the inverting terminal of the op amp. When modeling an I-to-V converter application, the Norton equivalent circuit of Figure 39 can be used directly. Capacitance CX is the total capaci- tance of the output of the current source plus the input capacitance of the op amp, which includes any stray capacitance at the op amp’s input. AD744 CL VOUT RO R CCOMP (OPTIONAL) CX IO RL CLOAD Figure 39. A Simplified Model of the AD744 Used as a Current-to-Voltage Converter When RO and IO are replaced with their Thevenin VIN and RIN equivalents, the general purpose inverting amplifier model of Figure 40 is created. Here capacitor CX represents the input capacitance of the AD744 (5.5 pF) plus any stray capacitance due to wiring and the type of IC package employed. AD744 CL VOUT RIN R CCOMP (OPTIONAL) CX VIN RL CLOAD Figure 40. A Simplified Model of the AD744 Used as an Inverting Amplifier |
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同様の説明 - AD744JR |
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