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AM27C010-200JC5 データシート(PDF) 10 Page - Advanced Micro Devices |
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AM27C010-200JC5 データシート(HTML) 10 Page - Advanced Micro Devices |
10 / 13 page 10 Am27C010 AC CHARACTERISTICS Caution: Do not remove the device from (or insert it into) a socket or board that has VPP or VCC applied. Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. This parameter is sampled and not 100% tested. 3. Switching characteristics are over operating range, unless otherwise specified. 4. See Figure 3 and Table 1 for test specifications. SWITCHING WAVEFORMS Notes: 1. OE# may be delayed up to tACC – tOE after the falling edge of the addresses without impact on tACC. 2. tDF is specified from OE# or CE#, whichever occurs first. PACKAGE CAPACITANCE Parameter Symbols Description Test Setup Am27C010 Unit JEDEC Standard -45 -55 -70 -90 -120 -150 -200 -255 tAVQV tACC Address to Output Delay CE#, OE# = VIL Max 45 55 70 90 120 150 200 250 ns tELQV tCE Chip Enable to Output Delay OE# = VIL Max 45 55 70 90 120 150 200 250 ns tGLQV tOE Output Enable to Output Delay CE# = VIL Max 25 3535 40 506575 75 ns tEHQZ tGHQZ tDF (Note 2) Chip Enable High or Output Enable High to Output High Z, Whichever Occurs First Max 25 2525 25 353540 40 ns tAXQX tOH Output Hold Time from Addresses, CE# or OE#, Whichever Occurs First Min 0 0000 000 ns Addresses CE# OE# Output 10205G-9 Addresses Valid High Z High Z tCE Valid Output 2.4 0.45 2.0 0.8 2.0 0.8 tACC (Note 1) tOE tDF (Note 2) tOH Parameter Symbol Parameter Description Test Conditions CDV028 PL 032 PD 028 Unit Typ Max Typ Max Typ Max CIN Input Capacitance VIN = 0 9 12 8 12 8 12 pF COUT Output Capacitance VOUT = 0 131511 14 1114 pF |
同様の部品番号 - AM27C010-200JC5 |
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同様の説明 - AM27C010-200JC5 |
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