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AM7969-175DKC データシート(PDF) 5 Page - Advanced Micro Devices

部品番号 AM7969-175DKC
部品情報  TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface)
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メーカー  AMD [Advanced Micro Devices]
ホームページ  http://www.amd.com
Logo AMD - Advanced Micro Devices

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Publication# 07370
Rev. F
Amendment /0
Issue Date: April 1994
Advanced
Micro
Devices
Am7968/Am7969
TAXIchip
TM Integrated Circuits
(Transparent Asynchronous Xmitter-Receiver Interface)
FINAL
DISTINCTIVE CHARACTERISTICS
s
Parallel TTL bus interface
— Eight Data and four Command Pins
— or nine Data and three Command Pins
— or ten Data and two Command Pins
s
Transparent synchronous serial link
— +5 V ECL Serial I/O
— AC or DC coupled
— NRZI 4B/5B, 5B/6B encoding/decoding
s
Drive coaxial cable or twisted pair directly
s
Easy interface with fiber optic data links
s
32–140 Mbps (4–17.5 Mbyte/s) data
throughput
s
Asynchronous input using STRB/ACK
s
Automatic MUX/DEMUX of Data and Command
s
Complete on-chip PLL, Crystal Oscillator
s
Single +5 V supply operation
s
28-pin PLCC or DIP or LCC
GENERAL DESCRIPTION
The Am7968 TAXIchip Transmitter and Am7969
TAXIchip Receiver Chipset is a general-purpose inter-
face for very high-speed (4–17.5 Mbyte/s, 40–175
Mbaud serially) point-to-point communications over co-
axial or fiber-optic media. The TAXIchip set emulates a
pseudo-parallel register. They load data into one side
and output it on the other, except in this case, the “other”
side is separated by a long serial link.
The speed of a TAXIchip system is adjustable over a
range of frequencies, with parallel bus transfer rates of
4 Mbyte/s at the low end, and up to 17.5 Mbyte/s at the
high end. The flexible bus interface scheme of the
TAXIchip set accepts bytes that are either 8, 9, or
10 bits wide. Byte transfers can be Data or Command
signaling.
BLOCK DIAGRAM
Am7968
Note:
N can be 8, 9, or 10 bits; total of N + M = 12.
07370F-1
Strobe (STRB)
Acknowledge (ACK
Clock (CLK)
Data Mode Select (DMS)
Test Serial In
(TSERIN)
Test/Local Select (TLS)
Strobe &
Acknowledge
Oscillator
and
Clock Gen.
Serial Interface
Shifter
Data Encoder
Encoder Latch
Input Latch
Media
Interface
(SEROUT+) Serial Out +
(SEROUT–) Serial Out –
Data
Command
NM
X1
X2


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