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SN74ABT7820-15PH データシート(PDF) 9 Page - Texas Instruments |
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SN74ABT7820-15PH データシート(HTML) 9 Page - Texas Instruments |
9 / 18 page SN74ABT7820 512 × 18 × 2 STROBED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS206D – AUGUST 1991 – REVISED APRIL 1998 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 offset values for AF/AEFigure 2 The AF/AE flag of each FIFO has two programmable limits: the almost-empty offset value (X) and the almost-full offset value (Y). The offsets of a flag can be programmed from the input of its FIFO after it is reset and before any data is written to its memory. An AF/AE flag is high when its FIFO contains X or fewer words or (512 – Y) or more words. To program the offset values for AF/AEA, program enable (PENA) can be brought low after FIFO A is reset and only when LDCKA is low. On the following low-to-high transition of LDCKA, the binary value on A0 – A7 is stored as the almost-empty offset value (X) and the almost-full offset value (Y). Holding PENA low for another low-to-high transition of LDCKA reprograms Y to the binary value on A0 – A7 at the time of the second LDCKA low-to-high transition. PENA can be brought back high only when LDCKA is low during the first two LDCKA cycles. PENA can be brought high at any time after the second LDCKA pulse returns low. A maximum value of 255 can be programmed for either X or Y (see Figure 3). To use the default values of X = Y = 128 for AF/AEA, PENA must be tied high. No data is stored in the FIFO when its AF/AE offsets are programmed. The AF/AEB flag is programmed in the same manner. PENB enables LDCKB to program the AF/AEB offset values taken from B0 – B7. RSTA X and Y Y PENA A0 – A17 EMPTYA 1 2 LDCKA Word 1 Figure 3. Programming X and Y Separately for AF/AEA |
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