データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

AD5686 データシート(PDF) 8 Page - Analog Devices

部品番号 AD5686
部品情報  Quad, 16-/12-Bit nanoDAC with I2C Interface
Download  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD5686 データシート(HTML) 8 Page - Analog Devices

Back Button AD5686 Datasheet HTML 4Page - Analog Devices AD5686 Datasheet HTML 5Page - Analog Devices AD5686 Datasheet HTML 6Page - Analog Devices AD5686 Datasheet HTML 7Page - Analog Devices AD5686 Datasheet HTML 8Page - Analog Devices AD5686 Datasheet HTML 9Page - Analog Devices AD5686 Datasheet HTML 10Page - Analog Devices AD5686 Datasheet HTML 11Page - Analog Devices AD5686 Datasheet HTML 12Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 24 page
background image
AD5696/AD5694
Data Sheet
Rev. A | Page 8 of 24
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration, 16-Lead LFCSP
Figure 4. Pin Configuration, 16-Lead TSSOP
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
Description
LFCSP
TSSOP
1
3
VOUTA
Analog Output Voltage from DAC A. The output amplifier has rail-to-rail operation.
2
4
GND
Ground Reference Point for All Circuitry on the Part.
3
5
VDD
Power Supply Input. The parts can be operated from 2.7 V to 5.5 V. The supply should be decoupled
with a 10 µF capacitor in parallel with a 0.1 µF capacitor to GND.
4
6
VOUTC
Analog Output Voltage from DAC C. The output amplifier has rail-to-rail operation.
5
7
VOUTD
Analog Output Voltage from DAC D. The output amplifier has rail-to-rail operation.
6
8
SDA
Serial Data Input. This pin is used in conjunction with the SCL line to clock data into or out of the
24-bit input shift register. SDA is a bidirectional, open-drain data line that should be pulled to the
supply with an external pull-up resistor.
7
9
LDAC
LDAC can be operated in two modes, asynchronous update mode and synchronous update mode.
Pulsing this pin low allows any or all DAC registers to be updated if the input registers have new
data; all DAC outputs are simultaneously updated. This pin can also be tied permanently low.
8
10
GAIN
Gain Select Pin. When this pin is tied to GND, all four DAC outputs have a span of 0 V to VREF.
When this pin is tied to VLOGIC, all four DAC outputs have a span of 0 V to 2 × VREF.
9
11
VLOGIC
Digital Power Supply. Voltage ranges from 1.8 V to 5.5 V.
10
12
A0
Address Input. Sets the first LSB of the 7-bit slave address.
11
13
SCL
Serial Clock Line. This pin is used in conjunction with the SDA line to clock data into or out of the
24-bit input shift register.
12
14
A1
Address Input. Sets the second LSB of the 7-bit slave address.
13
15
RESET
Asynchronous Reset Input. The RESET input is falling edge sensitive. When RESET is activated
(low), the input register and the DAC register are updated with zero scale or midscale, depending
on the state of the RSTSEL pin. When RESET is low, all LDAC pulses are ignored.
14
16
RSTSEL
Power-On Reset Pin. When this pin is tied to GND, all four DACs are powered up to zero scale.
When this pin is tied to VLOGIC, all four DACs are powered up to midscale.
15
1
VREF
Reference Input Voltage.
16
2
VOUTB
Analog Output Voltage from DAC B. The output amplifier has rail-to-rail operation.
17
N/A
EPAD
Exposed Pad. The exposed pad must be tied to GND.
12
11
10
1
3
4
A1
SCL
A0
9
VLOGIC
VOUTA
VDD
2
GND
VOUTC
AD5696/AD5694
NOTES
1. THE EXPOSED PAD MUST BE TIED TO GND.
TOP VIEW
(Not to Scale)
1
2
3
4
5
6
7
8
VOUTB
VOUTA
GND
VOUTD
VOUTC
VDD
VREF
SDA
16
15
14
13
12
11
10
9
RESET
A1
SCL
GAIN
LDAC
VLOGIC
A0
RSTSEL
TOP VIEW
(Not to Scale)
AD5696/
AD5694


同様の部品番号 - AD5686

メーカー部品番号データシート部品情報
logo
Analog Devices
AD5686 AD-AD5686 Datasheet
683Kb / 28P
   Quad, 16-/12-Bit nanoDAC with SPI Interface
REV. A
AD5686 AD-AD5686 Datasheet
787Kb / 12P
   Full-featured evaluation board
AD5686 AD-AD5686 Datasheet
746Kb / 27P
   Quad, 16-/12-Bit nanoDAC
AD5686ACPZ-RL7 AD-AD5686ACPZ-RL7 Datasheet
683Kb / 28P
   Quad, 16-/12-Bit nanoDAC with SPI Interface
REV. A
AD5686ACPZ-RL7 AD-AD5686ACPZ-RL7 Datasheet
746Kb / 27P
   Quad, 16-/12-Bit nanoDAC
More results

同様の説明 - AD5686

メーカー部品番号データシート部品情報
logo
Analog Devices
AD5696 AD-AD5696 Datasheet
748Kb / 24P
   Quad 16-/12-Bit nanoDAC I2C Interface
AD5696R AD-AD5696R_17 Datasheet
1,021Kb / 29P
   Quad 16-/14-/12-Bit nanoDAC Reference, I2C Interface
AD5684ARUZ-RL7 AD-AD5684ARUZ-RL7 Datasheet
683Kb / 28P
   Quad, 16-/12-Bit nanoDAC with SPI Interface
REV. A
AD5686 AD-AD5686 Datasheet
746Kb / 27P
   Quad, 16-/12-Bit nanoDAC
AD5316R AD-AD5316R Datasheet
1Mb / 24P
   Quad, 10-Bit nanoDAC Reference, I2C Interface
AD5686R AD-AD5686R_17 Datasheet
1,005Kb / 31P
   Quad 16-/14-/12-Bit nanoDAC Reference, SPI Interface
AD5686R AD-AD5686R Datasheet
830Kb / 32P
   Quad, 16-/14-/12-Bit nanoDAC
REV. 0
AD5696R AD-AD5696R Datasheet
761Kb / 32P
   Quad 16-/14-/12-Bit nanoDAC
REV. 0
AD5689 AD-AD5689 Datasheet
2Mb / 24P
   Dual, 16-/12-Bit nanoDAC with SPI Interface
REV. 0
AD5693R AD-AD5693R Datasheet
867Kb / 26P
   Tiny 16-/14-/12-Bit I2C nanoDAC
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com