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BD37033FV-M データシート(PDF) 10 Page - Rohm |
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BD37033FV-M データシート(HTML) 10 Page - Rohm |
10 / 41 page 10/38 Datasheet BD37033FV-M TSZ02201-0C2C0E100000-1-2 © 2013 ROHM Co., Ltd. All rights reserved. 3.NOV.2013 Rev.002 www.rohm.com TSZ22111 ・15・001 (2)I 2C BUS FORMAT MSB LSB MSB LSB MSB LSB S Slave Address A Select Address A Data A P 1bit 8bit 1bit 8bit 1bit 8bit 1bit 1bit S = Start conditions (Recognition of start bit) Slave Address = Recognition of slave address. 7 bits in upper order are voluntary. The least significant bit is “L” due to writing. A = ACKNOWLEDGE bit (Recognition of acknowledgement) Select Address = Select every of volume, bass and treble. Data = Data on every volume and tone. P = Stop condition (Recognition of stop bit) (3)I 2C BUS Interface Protocol 1)Basic form S Slave Address A Select Address A Data A P MSB LSB MSB LSB MSB LSB 2)Automatic increment(Select Address increases (+1) according to the number of data) S Slave Address A Select Address A Data1 A Data2 A ・・・・ DataN A P MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB (Example) ① Data 1 is set as data of Select Address (20h). ② Data 2 is set as data of Select Address +1 (28h). ③ Data N is set as data of Select Address +N-1. 3)Configuration unavailable for transmission (In this case, only Select Address 1 is set.) S Slave Address A Select Address1 A Data A Select Address 2 A Data A P MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB (Note)If any data is transmitted as Select Address 2 next to data, It is recognized as data, not as Select Address 2. (4)Slave Address MSB LSB A6 A5 A4 A3 A2 A1 A0 R/W 1 0 0 0 0 0 0 0 80H |
同様の部品番号 - BD37033FV-M |
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同様の説明 - BD37033FV-M |
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