AD7091R-4BRUZ-RL7 datasheet(6/41 Pages) ETC2

部品番号	AD7091R-4BRUZ-RL7

部品情報	2-/4-/8-Channel, 1 MSPS, Ultralow Power, 12-Bit ADC in 16-/20-/24-Lead TSSOP

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Data Sheet

AD7091R-2/AD7091R-4/AD7091R-8

TIMING SPECIFICATIONS

VDD = 2.7 V to 5.25 V, VDRIVE = 1.8 V to 5.25 V, TA = TMIN to TMAX, unless otherwise noted.

Table 2.

Parameter

Symbol

Min

Typ

Max

Unit

Conversion Time: CONVST Falling Edge to Data Available

tCONVERT

600

ns

Acquisition Time

tACQ

400

ns

Time Between Conversions (Normal Mode)

tCYC

1000

ns

CONVST Pulse Width

tCNVPW

10

500

ns

SCLK Period (Normal Mode)

tSCLK

ns

VDRIVE Above 2.7 V

16

ns

VDRIVE Above 1.8 V

22

ns

SCLK Period (Chain Mode)

tSCLK

ns

VDRIVE Above 2.7 V

20

ns

VDRIVE Above 1.8 V

25

ns

SCLK Low Time

tSCLKL

6

ns

SCLK High Time

tSCLKH

6

ns

SCLK Falling Edge to Data Remains Valid

tHSDO

5

ns

SCLK Falling Edge to Data Valid Delay

tDSDO

VDRIVE Above 4.5 V

12

ns

VDRIVE Above 3.3 V

13

ns

VDRIVE Above 2.7 V

14

ns

VDRIVE Above 1.8 V

20

ns

End of Conversion to CS Falling Edge

tEOCCSL

5

ns

CS Low to SDO Enabled

tEN

5

ns

CS High or Last SCLK Falling Edge to SDO High Impedance

tDIS

5

ns

SDI Data Setup Time Prior to SCLK Rising Edge

tSSDISCLK

5

ns

SDI Data Hold Time After SCLK Rising Edge

tHSDISCLK

2

ns

Last SCLK Falling Edge to Next CONVST Falling Edge

tQUIET

50

ns

Figure 2. Load Circuit for Digital Interface Timing

Figure 3. Voltage Levels for Timing

500µA

IOL

500µA

IOH

1.4V

TO SDO

CL

20pF

X% VDRIVE

VIH2

VIL2

VIH2

1FOR

≤ 3.0V, X = 90 AND Y = 10; FOR

> 3.0V, X = 70 AND Y = 30.

2MINIMUM VIH AND MAXIMUM VIL USED. SEE SPECIFICATIONS FOR DIGITAL

INPUTS PARAMETER IN TABLE 2.

tDELAY

NOTES

Y% VDRIVE

VDRIVE

Rev. 0 | Page 5 of 40

同様の部品番号 - AD7091R-4BRUZ-RL7

メーカー	部品番号	データシート	部品情報
Analog Devices	AD7091R-4BRUZ-RL7	861Kb / 42P	2-/4-/8-Channel, 1 MSPS, Ultralow Power, 12-Bit SAR ADC

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同様の説明 - AD7091R-4BRUZ-RL7

メーカー	部品番号	データシート	部品情報
Analog Devices	AD7091R-5	699Kb / 34P	4-Channel, I2C, Ultralow Power, 12-Bit ADC in 20-Lead LFCSP/TSSOP
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	AD7924	525Kb / 32P	4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP REV. C
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