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FIN1215MTDX データシート(PDF) 5 Page - Fairchild Semiconductor |
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FIN1215MTDX データシート(HTML) 5 Page - Fairchild Semiconductor |
5 / 20 page © 2003 Fairchild Semiconductor Corporation www.fairchildsemi.com FIN1215 / FIN1216 / FIN1217 • Rev. 1.0.3 5 Truth Tables Transmitter Inputs Outputs TxIn TxCLKIn PwrDn (1) TxOut± TxCLKOut± Active Active HIGH LOW / HIGH LOW / HIGH Active LOW / HIGH High Impedance HIGH LOW / HIGH Don’t Care (2) Floating Active HIGH LOW LOW / HIGH Floating Floating HIGH LOW Don’t Care (2) Don’t Care Don’t Care LOW High Impedance High Impedance Notes: 1. The outputs of the transmitter or receiver remain in a high-impedance state until VCC reaches 2V. 2. TxCLKOut± settles at a free running frequency when the part is powered up, PwrDn is HIGH and the TxCLKIn is a steady logic level LOW / HIGH / high-impedance. Receiver Inputs Outputs RxIn± RxCLKIn± /PwrDn (3) RxOut RxCLKOut Active Active HIGH LOW / HIGH LOW / HIGH Active Failsafe Condition (4) HIGH Last Valid State HIGH Failsafe Condition (4) Active HIGH HIGH LOW / HIGH Failsafe Condition (4) Failsafe Condition (4) HIGH Last Valid State (5) HIGH Don’t Care Don’t Care LOW LOW HIGH Notes: 3. The outputs of the transmitter or receiver remain in a high-impedance state until VCC reaches 2V. 4. Failsafe condition is defined as the input being terminated and un-driven, shorted, or open. 5. If RxCLKIn± is removed prior to the RxIn± date being removed, RxOut is the last valid state. If RxIn± data is removed prior to RxCLKIn± being removed, RxOut is HIGH. |
同様の部品番号 - FIN1215MTDX |
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同様の説明 - FIN1215MTDX |
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