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データシートサーチシステム |
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TPD12S015 データシート(PDF) 9 Page - Texas Instruments |
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TPD12S015 データシート(HTML) 9 Page - Texas Instruments |
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9 / 32 page  TPD12S015 www.ti.com SLLSE19E – DECEMBER 2009 – REVISED JUNE 2013 SWITCHING CHARACTERISTICS PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CL Bus load capacitance (B side) 750 pF Bus load capacitance (A side) 15 Voltage Level Shifter: SCL, SDA Lines (x_A & x_B ports); VCCA = 1.2V VCCA = 1.2 V PARAMETER PINS TEST CONDITIONS MIN TYP MAX UNIT tPHL Propagation delay A to B DDC Channels Enabled 344 ns B to A 335 tPLH Propagation delay A to B DDC Channels Enabled 452 ns B to A 178 tf A port fall time A Port DDC Channels Enabled 138 ns B port fall time B Port 83 tr A port rise time A Port DDC Channels Enabled 194 ns B port rise time B Port 92 fMAX Maximum switching frequency DDC Channels Enabled 400 kHz Voltage Level Shifter: CEC Line (x_A & x_B ports); VCCA = 1.2V VCCA = 1.2 V PARAMETER PINS TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay A to B CEC Channels Enabled 445 ns B to A 337 tPLH A to B 13 μs B to A 0.266 tf A port fall time A Port CEC Channels Enabled 140 ns B port fall time B Port 96 tr A port rise time A Port CEC Channels Enabled 202 ns B port rise time B Port 15 μs Voltage Level Shifter: HPD Line (x_A & x_B ports); VCCA = 1.2V VCCA = 1.2 V PARAMETER PINS TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay B to A CEC Channels Enabled 10 μs tPLH B to A 9 tf A port fall time A Port CEC Channels Enabled 0.67 ns tr A port rise time A Port CEC Channels Enabled 0.74 ns Voltage Level Shifter: SCL, SDA Lines (x_A & x_B ports); VCCA = 1.5V VCCA = 1.5 V PARAMETER PINS TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay A to B DDC Channels Enabled 335 B to A 265 ns tPLH A to B 438 B to A 169 Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TPD12S015 |
同様の部品番号 - TPD12S015_14 |
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同様の説明 - TPD12S015_14 |
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