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AD2S99 データシート(PDF) 7 Page - Analog Devices |
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AD2S99 データシート(HTML) 7 Page - Analog Devices |
7 / 8 page REV. B –7– AD2S99 AD2S99/AD2S93 TYPICAL CONFIGURATION Figure 5 shows a typical circuit configuration for the AD2S99 Oscillator and the AD2S93 LVDT-to-Digital Converter. The maximum level of the A and B transducer input signals to the AD2S93 should be 1 V rms ± 20%. All the analog ground sig- nals should be star connected to the AD2S93 AGND pin. If shielded twisted pair cables are used for the LVDT signals, the shields should also be terminated at the AD2S93 AGND pin. The SYNREF output of the AD2S99 cannot be used as the REF input signal for the AD2S93. The zero crossing reference for the AD2S93 should be taken from the primary winding of the LVDT through a phase lead or lag network. The phase com- pensation network ensures that the REF input is phase coherent with the A and B input signals to the AD2S93. NC = NO CONNECT NC SIN NC DGND COS EXC EXC NC AGND NC 19 3 1 2 20 4 5 8 6 7 12 13 911 10 18 17 14 16 15 TOP VIEW (Not to Scale) AD2S99 4.7µF 4.7µF 0.1µF 0.1µF SEC PRI LVDT VDD VSS VDD 0.1µF 50k Ω 4.7µF 0.1µF 4.7µF VSS SEL2 = GND SEL1 = VSS FOUT = 5kHz VDD NC = NO CONNECT 26 27 28 4 2 3 15 18 17 16 12 14 13 25 24 21 20 19 23 22 1 56 9 10 11 78 R2 C2 C1 C3 R5 R6 R7 C4 DMODOUT B A PHASE COMP LOS TOP VIEW (Not to Scale) AD2S93 B NC LOS GAIN DIFF AGND A VSS DGND DIR NULL OVR VDD Figure 5. AD2S99 and AD2S93 Example Configuration |
同様の部品番号 - AD2S99_15 |
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同様の説明 - AD2S99_15 |
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