データシートサーチシステム |
|
AD1845 データシート(PDF) 9 Page - Analog Devices |
|
AD1845 データシート(HTML) 9 Page - Analog Devices |
9 / 40 page AD1845 –9– REV. C Power Supplies Pin Name PLCC TQFP I/O Description VCC 35 & 36 41 & 42 I Analog Supply Voltage (+5 V). GNDA 34 & 37 40 & 43 I Analog Ground. VDD 1, 7, 15, 10, 14, I Digital Supply Voltage (+5 V). 19, 45, 55, 68, 54 88, 98 GNDD 2, 8, 16, 11, 15, 20, I Digital Ground. 20, 25, 54, 67, 44, 53, 79, 89, 64 99 (Continued from page 1) unsigned magnitude PCM linear data, and 8-bit µ-law or A-law companded digital data. The ∑∆ DACs are preceded by a digital interpolation filter. An attenuator provides independent user volume control over each DAC channel. Nyquist images and shaped quantized noise are removed from the DACs’ analog stereo output by on-chip switched-capacitor and continuous-time filters. The AD1845 supports multiple low power and power-down modes to support notebook and portable computing multimedia applications. The ADC, DAC, and mixer paths can be sus- pended independently allowing the AD1845 to be used for capture-only or playback-only, lessening power consumption and extending battery life. The AD1845 includes a variable sample frequency generator, that allows the codec to instantaneously change sample rates with a resolution of 1 Hz without “clicks” and “pops.” Addi- tionally, ∑∆ quantization noise is kept out of the 20 kHz audio band regardless of the chosen sample rate. The codec uses the variable sample frequency generator to derive all internal clocks from a single external crystal or clock source. Expanded Mode (MODE2) MODE1 is the initial state of the AD1845. In this state the AD1845 appears as an AD1848 compatible device. To access the expanded modes of operation on the AD1845, the MODE2 bit should be set in the Miscellaneous Information Control Register. When this bit is set to one, 16 additional indirect registers can be addressed allowing the user to access the AD1845’s expanded features. The AD1845 can return to MODE1 operation by clearing the MODE2 bit. In both MODE1 and MODE2, the capture and playback FIFOs are active to prevent data loss. The additional MODE2 functions are: 1. Full-Duplex DMA support. 2. MIC input mixer, mute and volume control. 3. Mono output with mute control. 4. Mono input with mixer volume control. 5. Software controlled advanced power-down modes. 6. Programmable sample rates from 4 kHz to 50 kHz in 1 Hz increments. ADDRESS DECODE CS A1 A0 WR RD DATA7:0 DBDIR DBEN PDRQ CDRQ PDAK CDAK INT AD1845 18 AEN SA19:2 SA1 SA0 IOWC IORC DATA7:0 DRQ <X> DRQ <Y> DAK <X> DAK <Y> IRQ <Z> 8 8 G 74_245 BA DIR S A B U S I Figure 1. Interface to ISA Bus External circuit requirements are limited to a minimal number of low cost support components. Anti-imaging DAC output filters are incorporated on-chip. Dynamic range exceeds 80 dB over the 20 kHz audio band. Sample rates from 4 kHz to 50 kHz are supported from a single external crystal or clock source. The AD1845 has built-in 8/16 mA (user selectable) bus drivers. If 24 mA drive capability is required, the AD1845 generates enable and direction controls for IC bus buffers such as the 74 245. The codec includes a stereo pair of ∑∆ analog-to-digital con- verters and a stereo pair of ∑∆ digital-to-analog converters. The AD1845 mixer surpasses MPC Level-2 recommendations. Inputs to the ADC can be selected from four stereo pairs of analog signals: line (LINE), microphone (MIC), auxiliary line #1 (AUX1), and post-mixed DAC output. A software-con- trolled programmable gain stage allows independent gain for each channel going into the ADC. In addition, the analog mixer allows the mono input (M_IN), MIC, AUX1, LINE and auxil- iary line #2 (AUX2) signals to be mixed with the DACs’ output. The ADCs’ output can be digitally mixed with the DACs’ input. The pair of 16-bit outputs from the ADCs is available over a byte-wide bidirectional interface that also supports 16-bit digital input to the DACs and control information. The AD1845 can accept and generate 16-bit twos complement PCM linear digital data in both little endian or big endian byte ordering, 8-bit |
同様の部品番号 - AD1845_15 |
|
同様の説明 - AD1845_15 |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |