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AD6411 データシート(PDF) 8 Page - Analog Devices |
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AD6411 データシート(HTML) 8 Page - Analog Devices |
8 / 11 page AD6411 –8– REV. 0 One-Time Setup Register Bit Definitions RSB: Receive Control Line Sense Bit RSB Function 0 Receive Section POWER UP Active HIGH 1 Receive Section POWER UP Active LOW TSB: Transmit Control Line Sense Bit TSB Function 0 Transmit Section POWER UP Active HIGH 1 Transmit Section POWER UP Active LOW SSB: Synthesizer Control Line Sense Bit SSB Function 0 Synthesizer POWER UP Active LOW 1 Synthesizer POWER UP Active HIGH RXM1, RXM0: Divider Power Mode In Active Receive Slot RXM1 RXM0 Function 0 0 Dividers Powered Down, VCO Fly- wheeled in Active Receive Mode 0 1 Dividers Powered Up, VCO Fly- wheeled in Active Receive Mode 1 0 Dividers Powered Up, VCO Locked to Synthesizer in Active Receive Mode 1 1 Dividers Powered Up, VCO Locked to Synthesizer in Active Receive Mode TXM: Divider Power Mode In Active Transmit Slot TXM Function 0 Dividers Powered Down, VCO Flywheeled in Active Mode 1 Dividers Powered Up, VCO Flywheeled in Active Mode BSWS: Band Switch Sense (Control with External Lines) BSWS Function 0 Band Switch Output High in Receive Slot, PIN Diode ON 1 Band Switch Output Low in Receive Slot, PIN Diode ON CF0: Configuration Bit 0 CF0 Function 0 Use Serial Interface for Mode Control 1 Use External Control Lines for Mode Control CT1, CT0: Charge Pump Test Bits CT1 CT0 Function 0 0 Three-State Output 0 1 Force Pump UP Current (Nom 1 mA) 1 0 Force Pump DOWN Current (Nom 1 mA) 1 1 Normal Operation (Driven from PFD) DSD: Disable Data Slicer DSD Function 0 Disable On-Chip Data Slicer. Analog Output at Pin DEMOD_DATA 1 Enable On-Chip Data Slicer. Digital Output at Pin DEMOD_DATA DSD bit is configured at power-up depending on whether an external data slicer is being used in the system. Data slicer is disabled when the IF strip is powered down irrespective of the status of bit DSD. SFM: S-Field Mode SFM Function 0 Normal Demodulation Mode 1 S-Field Sampling Mode PDS: Phase Detector Sense PDS Function 0 PFD Pumps UP when Fvco > Fref 1 PFD Pumps UP when Fref > Fvco RD: Reference Divide Ratio RD Function 0 Reference Frequency = 10.368 MHz 1 Reference Frequency = 13.824 MHz |
同様の部品番号 - AD6411_15 |
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同様の説明 - AD6411_15 |
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