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AD7942 データシート(PDF) 1 Page - Analog Devices |
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AD7942 データシート(HTML) 1 Page - Analog Devices |
1 / 24 page 14-Bit, 250 kSPS PulSAR, Pseudo Differential ADC in MSOP/LFCSP Data Sheet AD7942 Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2005–2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES 14-bit resolution with no missing codes Throughput: 250 kSPS INL: ±0.4 LSB typical, ±1 LSB maximum (±0.0061% of FSR) SINAD: 85 dB at 20 kHz THD: −100 dB at 20 kHz Pseudo differential analog input range 0 V to VREF with VREF up to VDD No pipeline delay Single-supply 2.3 V to 5.5 V operation with 1.8 V/2.5 V/3 V/5 V logic interface Proprietary serial interface SPI-/QSPI-/MICROWIRE-/DSP-compatible1 Daisy-chaining for multiple ADCs and busy indicator Power dissipation 1.25 mW at 2.5 V/100 kSPS, 3.6 mW at 5 V/100 kSPS 1.25 μW at 2.5 V/100 SPS Standby current: 1 nA 10-lead package: MSOP and 3 mm × 3 mm LFCSP Pin-for-pin compatible with the 16-bit AD7685 APPLICATIONS Battery-powered equipment Data acquisition Instrumentation Medical instruments Process controls APPLICATION DIAGRAM AD7942 REF GND VDD IN+ IN– VIO SDI SCK SDO CNV 1.8V TO VDD 3- OR 4-WIRE INTERFACE (SPI, DAISY CHAIN, CS) 0.5V TO 5V 2.5V TO 5V 0V TO VREF Figure 1. GENERAL DESCRIPTION The AD7942 is a 14-bit, charge redistribution, successive approxi- mation PulSAR ® ADC that operates from a single power supply, VDD, between 2.3 V to 5.5 V. It contains a low power, high speed, 14-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, it samples an analog input, IN+, between 0 V to VREF with respect to a ground sense, IN−. The reference voltage, VREF, is applied externally and is set up to be the supply voltage. Its power scales linearly with the throughput. The SPI-compatible serial interface also features the ability, using the SDI input, to daisy-chain several ADCs on a single 3-wire bus and provides an optional busy indicator. It is com- patible with 1.8 V, 2.5 V, 3 V, or 5 V logic using a separate supply (VIO). The AD7942 is housed in a 10-lead MSOP or a 10-lead LFCSP package yet fits in the same size footprint as the 8-lead MSOP or SOT-23. Operation for the AD7942 is specified from −40°C to +85°C. 1 Protected by U.S. Patent 6,703,961. Table 1. MSOP, LFCSP/SOT-23, 14-/16-/18-Bit ADCs Type 100 kSPS 250 kSPS 400 kSPS to 500 kSPS ≥1000 kSPS ADC Driver 14-Bit AD7940 AD79421 AD79461 16-Bit AD7680 AD76851 AD76861 AD79801 ADA4941-x AD7683 AD76871 AD76881 AD79831 ADA4841-x AD7684 AD7694 AD76931 18-Bit AD76911 AD76901 AD79821 ADA4941-x AD79841 ADA4841-x 1 Pin-for-pin compatible to the AD7942. |
同様の部品番号 - AD7942_15 |
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同様の説明 - AD7942_15 |
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