AD8343

Rev. B | Page 6 of 32

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

14

13

12

11

10

9

8

1

2

3

4

5

6

7

COMM

INPP

INPM

DCPL

VPOS

PWDN

COMM

COMM

OUTP

OUTM

COMM

LOIP

LOIM

COMM

AD8343

TOP VIEW

(Not to Scale)

Figure 2. Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 7, 8, 11, 14

COMM

Connect to low impedance circuit ground.

2

INPP

Differential Input Pin. This pin needs to be dc-biased and typically ac-coupled; see Figure 3.

3

INPM

Differential Input Pin. This pin needs to be dc-biased and typically ac-coupled; see Figure 3.

4

DCPL

Bias rail decoupling capacitor connection for LO driver; see Figure 6.

5

VPOS

shown in the Applications section.

6

PWDN

Power-Down Interface. Connect pin to ground for normal operating mode. Connect pin to supply for power-

down mode; see Figure 5.

9

LOIM

Differential Local Oscillator (LO) Input Pin. Typically ac-coupled; see Figure 4.

10

LOIP

Differential Local Oscillator (LO) Input Pin. Typically ac-coupled; see Figure 4.

12

OUTM

Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3.

13

OUTP

Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3.