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AD9951 データシート(PDF) 1 Page - Analog Devices |
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AD9951 データシート(HTML) 1 Page - Analog Devices |
1 / 28 page 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer AD9951 Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2003–2009 Analog Devices, Inc. All rights reserved. FEATURES 400 MSPS internal clock speed Integrated 14-bit DAC 32-bit tuning word Phase noise ≤ –120 dBc/Hz @ 1 kHz offset (DAC output) Excellent dynamic performance >80 dB SFDR @ 160 MHz (±100 kHz offset) AOUT Serial I/O control 1.8 V power supply Software and hardware controlled power-down 48-lead TQFP/EP package Support for 5 V input levels on most digital inputs PLL REFCLK multiplier (4× to 20×) Internal oscillator, can be driven by a single crystal Phase modulation capability Multichip synchronization APPLICATIONS Agile LO frequency synthesis Programmable clock generators Test and measurement equipment Acousto-optic device drivers FUNCTIONAL BLOCK DIAGRAM COS(X) CONTROL REGISTERS OSCILLATOR/BUFFER SYNC ENABLE I/O UPDATE DAC_RSET DDS CORE PHASE OFFSET PHASE ACCUMULATOR Z–1 Z–1 IOUT IOUT OSK PWRDWNCTL REFCLK REFCLK CRYSTAL OUT I/O PORT DAC SYSTEM CLOCK SYSTEM CLOCK SYNC_IN SYNC_CLK RESET TIMING AND CONTROL LOGIC 4× TO 20× CLOCK MULTIPLIER ÷ 4 AD9951 32 32 14 14 19 14 0 M U X M U X Figure 1. |
同様の部品番号 - AD9951_15 |
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同様の説明 - AD9951_15 |
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