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ADCMP608 データシート(PDF) 10 Page - Analog Devices |
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ADCMP608 データシート(HTML) 10 Page - Analog Devices |
10 / 10 page ADCMP608 Data Sheet Rev. B | Page 10 of 10 OUTLINE DIMENSIONS Figure 14. 6-Lead Thin Shrink Small Outline Transistor Package [SC70] (KS-6) Dimensions shown in millimeters ORDERING GUIDE Model1 Temperature Range Package Description Package Option Branding ADCMP608BKSZ-R2 −40°C to +125°C 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 G0U ADCMP608BKSZ-RL −40°C to +125°C 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 G0U ADCMP608BKSZ-REEL7 −40°C to +125°C 6-Lead Thin Shrink Small Outline Transistor Package [SC70] KS-6 G0U EVAL-ADCMP608BKSZ Evaluation Board 1 Z = RoHS Compliant Part. 1.30 BSC COMPLIANT TO JEDEC STANDARDS MO-203-AB 1.00 0.90 0.70 0.46 0.36 0.26 2.20 2.00 1.80 2.40 2.10 1.80 1.35 1.25 1.15 0.10 MAX 1.10 0.80 0.40 0.10 0.22 0.08 3 12 4 6 5 0.65 BSC COPLANARITY 0.10 SEATING PLANE 0.30 0.15 ©2007–2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06769-0-11/14(B) |
同様の部品番号 - ADCMP608_15 |
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同様の説明 - ADCMP608_15 |
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