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ISL5586FCM データシート(PDF) 8 Page - Intersil Corporation

部品番号 ISL5586FCM
部品情報  Low Power Ringing SLIC for Home Gateways
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メーカー  INTERSIL [Intersil Corporation]
ホームページ  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL5586FCM データシート(HTML) 8 Page - Intersil Corporation

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4-8
To allow for proper ring trip operation, the transient current
limit setting should be set at least 25% higher than the peak
ring trip current setting. Setting the transient current 25%
higher should account for programming tolerances of both
the ring trip threshold and the transient current limit.
If loop current is larger than ring trip current (low REN
applications) then the transient current limit should be set at
least 35% higher than the loop current setting. The slightly
higher offset accounts for the slope of the loop current limit
function.
Attention to detail should be exercised when programming
the transient current limit setting. If ring trip detect does not
occur while ringing, then re-examine the transient current
limit and ring trip threshold settings.
Low Power Standby Mode
Overview
The low power standby mode (LPS, 000) should be used in
conjunction with the high battery during idle line conditions.
The SLIC is designed to operate from the high battery during
this mode so MTU compliance can be met. Most of the
internal circuitry is powered down, resulting in low power
dissipation. If MTU compliance is not required during idle line
conditions, the device may be operated from the low battery
which will decrease the standby power dissipation.
2-Wire Interface
In the LPS mode, the 2-wire interface is maintained with
internal switches, resistors, and voltage references. The Tip
and Ring amplifiers are turned off to conserve power. The
device will provide MTU compliance, loop current, and loop
supervision. Figure 2 represents the internal circuitry
providing the 2-wire interface when in this mode of operation.
MTU Compliance
Maintenance Termination Unit or MTU compliance places
DC voltage requirements on the 2-wire terminals during idle
line conditions. The minimum idle voltage for compliance is
42.75V. The high side of the MTU range is 56V. The voltage
is expressed as the difference between Tip and Ring.
The Tip voltage is held near ground through a 600
Ω resistor
and switch. The Ring voltage is nominally limited to -49V by
the MTU reference. A switch and 600
Ω resistor connect the
MTU reference to the Ring terminal. When the high battery
voltage exceeds the MTU reference of -49V, the Ring
terminal will be clamped by the internal reference. The same
Ring relationships apply when operating from the low
battery. For operating battery voltages (VBH) less than or
equal to the internal MTU reference, the Ring voltage will be
approximately 4.5 volts more positive than VBH.
Loop Current
In the LPS mode, the device is capable of providing DC
current to a load through a path of resistors and switches.
The current available for switch hook detect is a function of
the off hook loop resistance (RLOOP). This includes the off
hook phone resistance and copper loop resistance. The
current available during LPS is given by Equation 15.
Internal current limiting of the standby switches will limit the
maximum current to approximately 23mA. The longitudinal
current capability is guaranteed to be greater than or equal to
10mARMS per pin. When longitudinal currents exceed this
level, false off hook detection may occur. The reduction in
longitudinal current capability with respect to the Forward Active
mode is a result of turning off the Tip and Ring amplifiers.
On Hook Power Dissipation
The on hook power dissipation of the SLIC in the LPS mode
is determined by the operating voltages and quiescent
currents and is calculated below.
TABLE 1. DEVICE INTERFACES DURING LPS
INTERFACE
ON
OFF
NOTES
Receive
-
x
AC transmission, impedance
matching and ringing are
disabled during this mode.
Ringing
-
x
Transmit
-
x
2-Wire
x
-
Amplifiers disabled.
Loop Detect
x
-
Switch hook.
FIGURE 3. LPS 2-WIRE INTERFACE CIRCUIT DIAGRAM
TIP AMP
RING AMP
TIP
RING
MTU REF
GND
600
600
I
LOOP
1
49
()
() 600 600 R
LOOP
++
()
=
(EQ. 15)
P
LPS
V
BH
I
BH Q
×
V
BL
I
BL Q
×
V
CC
I
CC Q
×
++
=
(EQ. 16)
ISL5586


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