CDCL1810A

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SLLSEL1 – NOVEMBER 2014

Pin Functions

PIN

NAME

NUMBER

TYPE

DESCRIPTION

8, 11, 14, 17, 20, 23,

Power

1.8V digital power supply.

26, 29, 32, 35, 38, 41

2, 5, 44, 47

Power

1.8V analog power supply.

Exposed thermal pad

Power

Ground reference.

and pin 12

NC

1, 13, 45, 46, 48

I

Not connected; leave open.

Differential LVDS input. Single-ended 1.8-V input can be dc-coupled to pin 3 with pin 4

CLKP, CLKN

3, 4

I

either tied to pin 3 (recommended) or left open.

YP0, YN0

6, 7

YP1, YN1

9, 10

YP2, YN2

15, 16

YP3, YN3

18, 19

YP4, YN4

21, 22

O

10 differential CML outputs.

YP5, YN5

27, 28

YP6, YN6

30, 31

YP7, YN7

33, 34

YP8, YN8

40, 39

YP9, YN9

43, 42

SCL serial clock pin. SCL tolerated 1.8V on the input only. Open drain. Always connect

SCL

24

I

to a pull-up resistor.

SDA bidirectional serial data pin. SDA tolerates 1.8V on the input only.Open drain.

SDA

25

I/O

Always connect to a pull-up resistor.

Configurable least significant bits (ADD[1:0]) of the SDA/SCL device address. The fixed

ADD1, ADD0

37, 36

I

most significant bits (ADD[6:2]) of the 7-bit device address are 11010.

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