74AUP1GU04

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Product data sheet

Rev. 5 — 29 June 2012

3 of 21

NXP Semiconductors

74AUP1GU04

Low-power unbuffered inverter

6.2 Pin description

7.

Functional description

[1]

H = HIGH voltage level; L = LOW voltage level.

Fig 6.

Pin configuration SOT891, SOT1115 and

SOT1202

Fig 7.

Pin configuration SOT1226 (X2SON5)

74AUP1GU04

A

001aaf169

n.c.

GND

n.c.

Y

Transparent top view

2

3

1

5

4

6

n.c.

GND

1

3

2

5

4

A

Y

aaa-003014

Transparent top view

74AUP1GU04

Table 3.

Pin description

Symbol

Pin

Description

TSSOP5 and X2SON5 XSON6

n.c.

1

1

not connected

A

2

2

data input

GND

3

3

ground (0 V)

Y

4

4

data output

n.c.

-

5

not connected

5

6

supply voltage

Table 4.

Function table[1]

Input

Output

A

Y

LH

HL