データシートサーチシステム |
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TLV733P データシート(PDF) 3 Page - Texas Instruments |
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TLV733P データシート(HTML) 3 Page - Texas Instruments |
3 / 34 page OUT GND IN EN 1 2 4 3 1 2 3 5 4 OUT NC IN GND EN TLV733P www.ti.com SBVS235A – OCTOBER 2014 – REVISED DECEMBER 2014 5 Pin Configuration and Functions DBV Package SOT-23-5 (Top View) DQN Package 1-mm × 1-mm X2SON-4 (Top View) Pin Functions PIN NO. NAME DQN DBV I/O DESCRIPTION Enable pin. Drive EN greater than 0.9 V to turn on the regulator. EN 3 3 I Drive EN less than 0.35 V to put the LDO into shutdown mode. GND 2 2 — Ground pin Input pin. A small capacitor is recommended from this pin to ground. IN 4 1 I See the Input and Output Capacitor Selection section for more details. NC N/A 4 — No internal connection Regulated output voltage pin. For best transient response, use a small 1- μF OUT 1 5 O ceramic capacitor from this pin to ground. See the Input and Output Capacitor Selection section for more details. The thermal pad is electrically connected to the GND node. Thermal pad — — Connect to the GND plane for improved thermal performance. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TLV733P |
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同様の説明 - TLV733P |
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