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SM3470BB データシート(PDF) 7 Page - Nippon Precision Circuits Inc |
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SM3470BB データシート(HTML) 7 Page - Nippon Precision Circuits Inc |
7 / 19 page SM3470BB SEIKO NPC CORPORATION - 7 FUNCTIONAL DESCRIPTION Adjustment Circuit The adjustment circuit block accepts displacement detection 2-phase analog signals from the encoder (A-phase and B-phase) and the zero-point detection analog signal (Z-phase) and perform offset adjustment. The offset adjustment is set according to register data. For details, see “AnalogAdjustment BitAssignment.” In the offset adjustment sequence, first adjust the internal reference voltage (VDD/2) offsets (FA, FB, FZ) for the inverting output amplifier (monitoring IO1, IO2, IO3), then adjust the offsets (FAN, FBN, FZN) for the non-inverting output amplifier (monitoring DA, DB, DZ). If the A/B/Z-phase inputs are used as single-ended inputs, the AN, BN, and ZN inputs can be set to VDD/2 level according to the operating mode. Offset adjustment example (VDD=5.0V) AMP AMP A(cos) AN(-cos) Offset adjustment data FA[7:0] FAN[4:0] AMP AMP B(sin) BN(-sin) FB[7:0] FBN[4:0] AMP AMP Z ZN FZ[5:0] FZN[2:0] ANsig(-cos) Asig(cos) BNsig(-sin) Bsig(sin) ZNsig Zsig ×(-1) ×(-1) ×(-1) Offset adjustment data Offset adjustment data Offset adjustment data Offset adjustment data Offset adjustment data 1800 2000 2200 2400 2600 2800 3000 3200 0 32 64 96 128 160 192 224 256 Offset voltage adjustment data FA,(FB) A(B)phase inverting out put 1800 2000 2200 2400 2600 2800 3000 3200 0 8 16 24 32 40 48 56 64 Offset voltage adjustment data FZ Z phase inverting output 2450 2460 2470 2480 2490 2500 2510 2520 2530 2540 2550 0 4 8 12 1620 242832 Offset voltage adjustment data FAN,FBN A(B)phase non-inverting output 2470 2475 2480 2485 2490 2495 2500 2505 2510 2515 2520 2525 01 23 45 67 8 Offset voltage adjustment data FZN Z phase non-inverting output |
同様の部品番号 - SM3470BB |
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同様の説明 - SM3470BB |
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