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LM3673 データシート(PDF) 11 Page - Texas Instruments |
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LM3673 データシート(HTML) 11 Page - Texas Instruments |
11 / 28 page VOUT TIME (4 Ps/DIV) 200 mA/DIV IL VSW 2V/DIV 20 mV/DIV AC Coupled VIN = 3.6V VOUT = 1.5V IOUT = 20 mA LM3673 www.ti.com SNVS434L – JULY 2006 – REVISED OCTOBER 2015 Feature Description (continued) 8.3.4 Current Limiting A current limit feature allows the LM3673 to protect itself and external components during overload conditions. PWM mode implements current limiting using an internal comparator that trips at 750 mA (typical). If the output is shorted to ground the device enters a timed current limit mode where the NFET is turned on for a longer duration until the inductor current falls below a low threshold. This allows the inductor current more time to decay, thereby preventing runaway. 8.3.5 Soft Start The LM3673 has a soft-start circuit that limits in-rush current during start-up. During start-up the switch current limit is increased in steps. Soft start is activated only if EN goes from logic low to logic high after VIN reaches 2.7 V. Soft start is implemented by increasing switch current limit in steps of 70 mA, 140 mA, 280 mA, and 750 mA (typical switch current limit). The start-up time thereby depends on the output capacitor and load current. Typical start-up time with a 10-µF output capacitor and 150-mA load is 280 µs; with a 5-mA load start-up time is 240 µs. 8.3.6 Low Drop Out Operation (LDO) The LM3673-ADJ can operate at 100% duty cycle (no switching; PMOS switch completely on) for LDO support of the output voltage. In this way the output voltage is controlled down to the lowest possible input voltage. When the device operates near 100% duty cycle, output voltage ripple is approximately 25 mV. The minimum input voltage needed to support the output voltage is: VIN, MIN = ILOAD × (RDSON, PFET + RINDUCTOR) + VOUT where • ILOAD: Load current • RDSON, PFET: Drain-to-source resistance of PFET switch in the triode region • RINDUCTOR: Inductor resistance (1) 8.4 Device Functional Modes 8.4.1 PFM Operation At very light load, the converter enters PFM mode and operates with reduced switching frequency and supply current to maintain high efficiency. The part automatically transitions into PFM mode when either of two conditions occurs for a duration of 32 or more clock cycles: • The NFET current reaches zero. • The peak PMOS switch current drops below the IMODE level (typically IMODE < 30 mA + VIN / 42 Ω ). Figure 15. Typical PFM Operation Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LM3673 |
同様の部品番号 - LM3673_15 |
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同様の説明 - LM3673_15 |
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