ML2713

4

January, 2000

PRELIMINARY DATASHEET

PRELIMINARY

TOP VIEW

ML2713

48-Pin TQFP (H48-7)

NC

DPS

DPSB

VCC4

REG

MS2

BPO

BPOB

GND

1IF

1IF

VCC2

DD4

DD3

DD2

DD1

DD0

VCC1

VCC2

CMO

GND

VCC3

NC

NC

13 14 15 16 17

1

2

3

4

5

6

7

8

9

10

11

12

36

35

34

33

32

31

30

29

28

27

26

25

18 19 20 21 22 23 24

48 47 46 45 44 43 42 41 40 39 38 37

PIN DESCRIPTIONS

POWER AND GROUND

6, 7

VCC1

POWER

Voltage supply for digital I/O circuits. VCC1 should be greater than or

equal to VCC2, VCC3, and VCC4 in normal operation

21, 24, 25

VCC2

POWER

Voltage supply for receive image reject down-converter and transmit

image reject up-converter

10

VCC3

POWER

Voltage supply for D/A converter, comparator, mode control, and

alignment circuits

33

VCC4

POWER

Voltage supply for limiters, discriminator, data filter, and transmit

regulator

9

GND

GND

Ground for VCC1

18, 28

GND

GND

Ground for VCC2

16

GND

GND

Ground for VCC3

39

GND

GND

Ground for VCC4

CONTROL

13

RS

I (CMOS)

Receive mode enable. This CMOS input is referenced to VCC1 and has

an on-chip pull-up. See Table 1 for operation

14

TS

I (CMOS)

Transmit mode enable. This CMOS input is referenced to VCC1 and has

an on-chip pull-up. See Table 1 for operation.

15

LOE

I (CMOS)

Chip enable and filter align control. This CMOS input is referenced to

VCC1 and has an on-chip pull up. The pin must be low for the IC to

operate in either transmit, receive or align modes. See Table 1 for

operation

Pin #

Signal Name

I/O Type

Description

PIN CONFIGURATION