MC100EP196AMNG datasheet(3/18 Pages) ONSEMI

部品番号	MC100EP196AMNG

部品情報	3.3 V ECL Programmable Delay Chip

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MC100EP196A

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Table 1. PIN DESCRIPTION

Name

I/O

Default State

Description

23, 25, 26, 27,

29, 30, 31, 32,

1, 2

D[0:9]

LVCMOS, LVTTL,

ECL Input

Low

Single−Ended Parallel Data Inputs [0:9]. Internal 75 k

W to VEE.

(Note 1)

3

D[10]

LVCMOS, LVTTL,

ECL Input

Low

Single−Ended CASCADE/CASCADE Control Input. Internal 75 k

W

to VEE. (Note 1)

4

IN

LVPECL, LVDS

Low

Noninverted Differential Input. Internal 75 k

W to VEE.

5

IN

LVPECL, LVDS

High

Inverted Differential Input. Internal 75 k

W to VEE and 36.5 kW to

VCC.

6

VBB

−

ECL Reference Voltage Output

7

VEF

−

Reference Voltage for ECL Mode Connection

8

VCF

−

LVCMOS, ECL, OR LVTTL Input Mode Select

9, 24, 28

VEE

−

Negative Supply Voltage. All VEE Pins must be Externally

Connected to Power Supply to Guarantee Proper Operation.

(Note 2)

13, 18, 19, 22

VCC

−

Positive Supply Voltage. All VCC Pins must be externally

Connected to Power Supply to Guarantee Proper Operation.

(Note 2)

10

LEN

ECL Input

Low

Single−ended D pins LOAD / HOLD input. Internal 75 k

W to VEE.

11

SETMIN

ECL Input

Low

Single−ended Minimum Delay Set Logic Input. Internal 75 k

W to

VEE. (Note 1)

12

SETMAX

ECL Input

Low

Single−ended Maximum Delay Set Logic Input. Internal 75 k

W to

VEE. (Note 1)

14

CASCADE

ECL Output

−

Inverted Differential Cascade Output for D[10]. Typically Terminated

with 50

W to VTT = VCC − 2 V.

15

CASCADE

ECL Output

−

Noninverted Differential Cascade Output. for D[10] Typically

Terminated with 50

W to VTT = VCC − 2 V.

16

EN

ECL Input

Low

Single−ended Output Enable Pin. Internal 75 k

W to VEE.

17

FTUNE

Analog Input

−

Fine Tune Input

21

Q

ECL Output

−

Noninverted Differential Output. Typically Terminated with 50

W to

VTT = VCC − 2 V.

20

Q

ECL Output

−

Inverted Differential Output. Typically Terminated with 50

W to

VTT = VCC − 2 V.

1. SETMIN will override SETMAX if both are high. SETMAX and SETMIN will override all D[0:10] inputs.

2. All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.

同様の部品番号 - MC100EP196AMNG

メーカー	部品番号	データシート	部品情報
ON Semiconductor	MC100EP196	146Kb / 20P	3.3V ECL Programmable Delay Chip with FTUNE October, 2004 ??Rev. 10
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同様の説明 - MC100EP196AMNG

メーカー	部品番号	データシート	部品情報
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	MC100EP195B	189Kb / 17P	3.3V ECL Programmable Delay Chip September, 2008 ??Rev. 1
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