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LC87F2L08AU-DIP-E データシート(PDF) 2 Page - ON Semiconductor |
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LC87F2L08AU-DIP-E データシート(HTML) 2 Page - ON Semiconductor |
2 / 30 page LC87F2L08A No.A2279-2/30 Ports ● Normal withstand voltage I/O ports Ports I/O direction can be designated in 1 bit units 9(P14, P15, P20, P21, P30, P70 to P73) Ports I/O direction can be designated in 4 bit units 8 (P0n) ● Dedicated PPG ports 7 (PPGO, AMP1I, AMP2O, CMP1IA, CMP1IB, CMP2I, CMP4I) ● Dedicated oscillator ports/input ports 2 (CF1/XT1, CF2/XT2) ● Reset pin 1 (RES#) ● Power pins 3 (VSS1, VSS2, VDD1) Timers ●Timer 0 : 16-bit timer/counter with a capture register. Mode 0 : 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register) 2 channels Mode 1 : 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register) + 8-bit counter (with an 8-bit capture register) Mode 2 : 16-bit timer with an 8-bit programmable prescaler (with a 16-bit capture register) Mode 3 : 16-bit counter (with a 16-bit capture register) ● Timer 1 : 16-bit timer/counter Mode 0 : 8-bit timer with an 8-bit prescaler + 8-bit timer/counter with an 8-bit prescaler Mode 2 : 16-bit timer/counter with an 8-bit prescaler Mode 3 : 16-bit timer with an 8-bit prescaler ● Timer 6 : 8-bit timer with a 6-bit prescaler (with toggle outputs) ● Timer 7 : 8-bit timer with a 6-bit prescaler (with toggle outputs) ● Base timer 1) The clock is selectable from the subclock (32.768 kHz crystal oscillation), system clock, and timer 0 prescaler output. 2) Interrupts are programmable in 5 different time schemes High-speed clock counter ● Can count clocks with a maximum clock rate of 20 MHz (at a main clock of 10 MHz). SIO ● SIO1 : 8-bit asynchronous/synchronous serial interface Mode 0 : Synchronous 8-bit serial I/O (2-wire configuration, 2 to 512 Tcyc transfer clocks) Mode 2 : Bus mode 1 (start bit, 8 data bits, 2 to 512 Tcyc transfer clocks) Mode 3 : Bus mode 2 (start detect, 8 data bits, stop detect) UART ● Full duplex ● 7/8/9 bit data bits selectable ● 1 stop bit (2-bit in continuous data transmission) ● Built-in baudrate generator AD converter : 12 bits/8 bits 9 channels ● 12/8 bits AD converter resolution selectable Remote control receiver circuit (sharing pins with P73, INT3, and T0IN) ● Noise rejection function (noise filter time constant selectable from 1Tcyc/32Tcyc/128Tcyc) Clock output function ● Can generate clock outputs with a frequency of 1 1 , 2 1 , 4 1 , 8 1 , 16 1 , 32 1 , 64 1 of the source clock selected as the system clock. ● Can generate the source clock for the subclock. |
同様の部品番号 - LC87F2L08AU-DIP-E |
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同様の説明 - LC87F2L08AU-DIP-E |
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