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74LVC574A データシート(PDF) 2 Page - ON Semiconductor

部品番号 74LVC574A
部品情報  Low-Voltage CMOS Octal Buffer Flow Through Pinout
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
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74LVC574A
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Figure 1. Pinout: 20−Lead (Top View)
19
20
18
17
16
15
14
2
1
3456
7
VCC
13
8
12
9
11
10
O0
O1
O2
O3
O4
O5
O6
O7
CP
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
Figure 2. Logic Diagram
PIN NAMES
Function
Output Enable Input
Clock Pulse Input
Data Inputs
3−State Outputs
Pins
OE
CP
D0−D7
O0−O7
O0
D0
O1
D1
O2
D2
O3
D3
O4
D4
O5
D5
O6
D6
O7
D7
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
OE
11
1
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
TRUTH TABLE
INPUTS
OUTPUTS
OPERATING MODE
OE
CP
Dn
On
L
L
l
h
L
H
Load and Read Register
L
X
NC
Hold and Read Register
H
X
Z
Hold and Disable Outputs
H
H
l
h
Z
Z
Load Internal Register and Disable Outputs
H
= High Voltage Level
h
= High Voltage Level One Setup Time Prior to the Low−to−High Clock Transition
L
= Low Voltage Level
l
= Low Voltage Level One Setup Time Prior to the Low−to−High Clock Transition
NC = No Change, State Prior to Low−to−High Clock Transition
X
= High or Low Voltage Level and Transitions are Acceptable
Z
= High Impedance State
= Low−to−High Transition
= Not a Low−to−High Transition; For ICC Reasons, DO NOT FLOAT Inputs


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