データシートサーチシステム |
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FCBN425QB1C03 データシート(PDF) 5 Page - Finisar Corporation. |
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FCBN425QB1C03 データシート(HTML) 5 Page - Finisar Corporation. |
5 / 9 page FCBN425QB1Cxx PRELIMINARY Product Specification – September 2015 Finisar Corporation – 8-Sep-15 Rev A7 Preliminary Page 5 Notes: 1. Maximum total power value is specified across the full temperature and voltage range. 2. Settable in various discrete steps via the I2C interface. 3. From power-on and end of any fault conditions. 4. For jitter performance depending on CDR configuration, see below Jitter with TX and RX CDRs enabled Jitter (Measured at TP1) Symbol Min Typ Max Unit Ref Total Jitter Input iTLj pp 0.62 UI 1,2,3,5 Deterministic Jitter Input iDLj pp 0.42 UI 1,2,3,5 J2 Jitter Tolerance iLJ2 pp 0.5 UI 2,3,5 J9 Jitter Tolerance iLJ9 pp 0.58 UI 2,3,5 Jitter (Measured at TP4) Symbol Min Typ Max Unit Ref Total Jitter Output oTLj pp 0.45 UI 1,3,4,5 Deterministic Jitter Output oDLj pp 0.3 UI 1,3,4,5 J2 Jitter oLJ2 pp 0.34 UI 3,4,5 J9 Jitter oLJ9 pp 0.43 UI 3,4,5 Notes: 1. 28Gbps PRBS2^31, BER 10^-12. 2. Measured at TP1, minimum input voltage. 3. All channels are on for worst condition crosstalk. 4. Measured at TP4 with iTLj= 0.62UI, iDLj= 0.42UI at TP1, max temp. 5. These jitter values provided are for information only, they do not include the noise impact of the test O:E receiver required to measure them. Jitter with TX and RX CDRs in bypass Jitter (Measured at TP1) Symbol Min Typ Max Unit Ref Total Jitter Input iTLj pp 0.25 UI 1,2,3,5 Deterministic Jitter Input iDLj pp 0.05 UI 1,2,3,5 Data Depended Pulse Width Shrinkage DDPWS pp 0.01 UI 1,2,3,5 J2 Jitter Tolerance iLJ2 pp 0.12 UI 1,2,3,5 J9 Jitter Tolerance iLJ9 pp 0.23 UI 1,2,3,5 |
同様の部品番号 - FCBN425QB1C03 |
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同様の説明 - FCBN425QB1C03 |
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