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54ACT175D データシート(PDF) 1 Page - National Semiconductor (TI) |
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54ACT175D データシート(HTML) 1 Page - National Semiconductor (TI) |
1 / 8 page 54AC175 • 54ACT175 Quad D Flip-Flop General Description The ’AC/’ACT175 is a high-speed quad D flip-flop. The de- vice is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D in- puts is stored during the LOW-to-HIGH clock transition. Both true and complemented outputs of each flip-flop are pro- vided. A Master Reset input resets all flip-flops, independent of the Clock or D inputs, when LOW. Features n Edge-triggered D-type inputs n Buffered positive edge-triggered clock n Asynchronous common reset n True and complement output n Outputs source/sink 24 mA n ’ACT175 has TTL-compatible inputs n Standard Microcircuit Drawing (SMD) — ’AC175: 5962-89552 — ’ACT175: 5962-89693 Logic Symbols Pin Names Description D 0–D3 Data Inputs CP Clock Pulse Input MR Master Reset Input Q 0–Q3 True Outputs Q 0–Q3 Complement Outputs Connection Diagrams FACT® is a registered trademark of Fairchild Semiconductor Corporation. DS100278-1 IEEE/IEC DS100278-2 Pin Assignment for DIP and Flatpak DS100278-3 Pin Assignment for LCC DS100278-4 August 1998 © 1998 National Semiconductor Corporation DS100278 www.national.com |
同様の部品番号 - 54ACT175D |
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同様の説明 - 54ACT175D |
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