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TUA6030 データシート(PDF) 39 Page - Infineon Technologies AG |
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TUA6030 データシート(HTML) 39 Page - Infineon Technologies AG |
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39 / 49 page  Reference 5 - 39 TUA6030, TUA6032 Wireless Components Specification, July 2001 5.2 Programming Table 5-4 Bit Allocation Read / Write Name Byte Bits Ack MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB Write Data Address Byte ADB 1 10 00 MA1 MA0 R/ W=0 A Divider Byte 1 DB1 0 N14 N13 N12 N11 N10 N9 N8 A Divider Byte 2 DB2 N7 N6 N5 N4 N3 N2 N1 N0 A Control byte CB 1 CP T2 T1 T0 RSA RSB OS A Bandswitch byte BB P7 P6 P5 P4 P3 P2 P1 P0 A Auxiliary byte 1). 1). AB replaces BB when T2, T1, T0 = 0, 1, 1, see Table 5-7 Test modes on page 40 AB ATC AL2 AL1 AL0 0 00 0A Read data Address byte ADB 1 10 00 MA1 MA0 R/ W=1 A Status byte SB POR FL 1 1AGC A2 A1 A0 A Table 5-5 Description of Symbols Symbol Description A Acknowledge MA0, MA1 Address selection bits, see Table 5-6 Address selection on page 40 N14 to N0 programmable divider bits: N = 214 x N14 + 213 x N13 + ..... + 23 x N3 + 22 x N2 + 21 xN1 + N0 CP charge pump current bit: bit = 0: charge pump current = 60 µA bit = 1: charge pump current = 280µA (default) T0, T1, T2 test bits, see Table 5-7 Test modes on page 40 RSA, RSB reference divider bits, see Table 5-8 Reference divider ratios on page 40 OS tuning amplifier control bit: bit = 0: enable VT bit = 1: disable VT (default) P0, P1, P2, P3 PNP ports control bits bit = 0: Port is inactive, high impedance state (default) bit = 1: Port is active, VOUT= VCC-VCESAT P4, P5, P6, P7 NPN ports control bits bit = 0: Port is inactive, high impedance state (default) bit = 1: Port is active, VOUT= VCESAT ATC AGC time constant bit bit = 0: IAGC=220nA; ∆t=2s with C=160nF (default) bit = 1: IAGC=9µA; ∆t=50ms with C=160nF |
同様の部品番号 - TUA6030 |
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同様の説明 - TUA6030 |
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