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DAC3482IZAYR データシート(PDF) 2 Page - Texas Instruments

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部品番号 DAC3482IZAYR
部品情報  Dual-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter (DAC)
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
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DAC3482IZAYR データシート(HTML) 2 Page - Texas Instruments

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DAC3482
SLAS748F – MARCH 2011 – REVISED AUGUST 2015
www.ti.com
Table of Contents
7.4
Device Functional Modes........................................ 57
1
Features .................................................................. 1
7.5
Programming........................................................... 61
2
Applications ........................................................... 1
7.6
Register Map........................................................... 65
3
Description ............................................................. 1
8
Application and Implementation ........................ 82
4
Revision History..................................................... 2
8.1
Application Information............................................ 82
5
Pin Configuration and Functions ......................... 6
8.2
Typical Applications ............................................... 82
6
Specifications....................................................... 12
9
Power Supply Recommendations ...................... 88
6.1
Absolute Maximum Ratings .................................... 12
10
Layout................................................................... 89
6.2
ESD Ratings............................................................ 12
10.1
Layout Guidelines ................................................. 89
6.3
Recommended Operating Conditions ..................... 12
10.2
Layout Examples................................................... 90
6.4
Thermal Information ................................................ 13
10.3
Assembly............................................................... 92
6.5
Electrical Characteristics – DC Specifications ........ 13
11
Device and Documentation Support ................. 93
6.6
Electrical Characteristics – Digital Specifications ... 15
11.1
Device Support...................................................... 93
6.7
Electrical Characteristics – AC Specifications ........ 16
11.2
Documentation Support ........................................ 94
6.8
Electrical Characteristics - Phase-Locked Loop
Specifications ........................................................... 16
11.3
Community Resources.......................................... 94
6.9
Timing Requirements - Digital Specifications ......... 16
11.4
Trademarks ........................................................... 94
6.10
Switching Characteristics – AC Specifications...... 18
11.5
Electrostatic Discharge Caution ............................ 94
6.11
Typical Characteristics .......................................... 19
11.6
Glossary ................................................................ 94
7
Detailed Description ............................................ 27
12
Mechanical, Packaging, and Orderable
Information ........................................................... 95
7.1
Overview ................................................................. 27
12.1
Clarifications for DAC3482 Power Supply and
7.2
Functional Block Diagram ....................................... 27
Phase-Locked Loop Specification............................ 95
7.3
Feature Description................................................. 28
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (February 2013) to Revision F
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
Added NFBGA package to Description .................................................................................................................................. 1
Added additional operation requirement for SLEEP pin if SLEEP pin is set to logic HIGH before and during device
power up and initialization - RKD package............................................................................................................................. 8
Added additional circuit configuration for unused terminals ................................................................................................. 11
Changed DAC3484 to DAC3482 in SDENB description ...................................................................................................... 11
Added additional operation requirement for SLEEP pin if SLEEP pin is set to logic HIGH before and during device
power up and initialization - ZAY package. .......................................................................................................................... 11
Changed parameter name Single-Ended Swing Level to Single-Ended Input Level to better reflect the specification
for minimum recommended single-ended voltage level. ...................................................................................................... 15
Added DACCLK and OSTR minimum voltage note to Electrical Characteristics – Digital Specifications ........................... 15
Added text and application report link to Input FIFO section ............................................................................................... 31
Added reference to LMK0480x family in Input FIFO section................................................................................................ 32
Added pin number per package for LPF pin in PLL Mode section....................................................................................... 38
Changed figure and table references in FIR Filters section ................................................................................................. 39
Changed first paragraph in Complex Signal Mixer section .................................................................................................. 42
Deleted redundant text from Related Documentation section.............................................................................................. 50
Changed point to pointer in DAC3482 Alarm Monitoring section......................................................................................... 50
Added note to Figure 80 ...................................................................................................................................................... 52
Added VCOM values to Table 9.............................................................................................................................................. 53
Added Unused LVDS Port Termination section ................................................................................................................... 53
2
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