データシートサーチシステム |
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TPD7S019-15DBQR データシート(PDF) 3 Page - Texas Instruments |
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TPD7S019-15DBQR データシート(HTML) 3 Page - Texas Instruments |
3 / 21 page VIDEO1 1 VIDEO2 2 VIDEO3 3 GND 4 12 SYNC_OUT1 11 SYNC_IN1 10 DDC_OUT2 9 DDC_IN2 16 15 14 13 8 5 6 7 TPD7S019 www.ti.com SLLSE33C – AUGUST 2010 – REVISED NOVEMBER 2015 5 Pin Configuration and Functions RSV Package DBQ Package 16-Pin UQFN 16-Pin SSOP Top View Top View Pin Functions PIN TYPE DESCRIPTION RSV NAME DBQ NO. NO. BYP Bypass pin. Using a 0.2-µF bypass capacitor will increase the ESD robustness of the 8 6 Power system. DDC_IN1 10 8 DDC signal input. Connects to the VGA controller side of one of the sync lines. I DDC_IN2 11 9 DDC_OUT1 9 7 DDC signal output. Connects to the video connector side of one of the sync lines. O DDC_OUT2 12 10 GND 6 4 – Ground SYNC_IN1 13 11 Sync signal buffer input. Connects to the VGA controller side of one of the sync lines. I SYNC_IN2 15 13 SYNC_OUT1 14 12 Sync signal buffer output. Connects to the video connector side of one of the sync lines O SYNC_OUT2 16 14 VCC_DDC 7 5 Power Isolated supply input for the DDC_1 and DDC_2 level-shifting N-FET gates VCC_SYNC Isolated supply input for the SYNC_1 and SYNC_2 level shifters and their associated 1 15 Power ESD protection circuits VCC_VIDEO 2 16 Power Supply pin specifically for the VIDEO_1, VIDEO_2 and VIDEO_3 ESD protection circuits VIDEO1 3 1 High-speed ESD clamp input VIDEO2 4 2 ESD VIDEO3 5 3 Copyright © 2010–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPD7S019 |
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同様の説明 - TPD7S019-15DBQR |
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