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74F174SC データシート(PDF) 1 Page - National Semiconductor (TI) |
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74F174SC データシート(HTML) 1 Page - National Semiconductor (TI) |
1 / 8 page TLF9489 November 1994 54F74F174 Hex D Flip-Flop with Master Reset General Description The ’F174 is a high-speed hex D flip-flop The device is used primarily as a 6-bit edge-triggered storage register The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition The device has a Master Reset to simultaneously clear all flip-flops Features Y Edge-triggered D-type inputs Y Buffered positive edge-triggered clock Y Asynchronous common reset Y Guaranteed 4000V minimum ESD protection Commercial Military Package Package Description Number 74F174PC N16E 16-Lead (0300 Wide) Molded Dual-In-Line 54F174DM (Note 2) J16A 16-Lead Ceramic Dual-In-Line 74F174SC (Note 1) M16A 16-Lead (0150 Wide) Molded Small Outline JEDEC 74F174SJ (Note 1) M16D 16-Lead (0300 Wide) Molded Small Outline EIAJ 54F174FM (Note 2) W16A 16-Lead Cerpack 54F174LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier Type C Note 1 Devices also available in 13 reel Use Suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Logic Symbols Connection Diagrams TLF9489 – 3 IEEEIEC TLF9489 – 5 Pin Assignment for DIP SOIC and Flatpak TLF9489 – 1 Pin Assignment for LCC TLF9489 – 2 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation RRD-B30M75Printed in U S A |
同様の部品番号 - 74F174SC |
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同様の説明 - 74F174SC |
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