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D001

SN54HC05, SN74HC05

www.ti.com

SCLS080E – FEBRUARY 2015 – REVISED MARCH 2015

Typical Application (continued)

9.2.3 Application Curve

10 Power Supply Recommendations

The power supply can be any voltage between the minimum and maximum supply voltage rating located in the

disturbance. For devices with a single supply, TI recommends a 0.1-µF capacitor. If there are multiple VCC

terminals, then TI recommends a 0.01-µF or 0.022-µF capacitor for each power terminal. Multiple bypass

capacitors can be paralleled to reject different frequencies of noise. Frequencies of 0.1

μF and 1 μF are

commonly used in parallel. The bypass capacitor should be installed as close as possible to the power terminal

for best results.

11 Layout

11.1 Layout Guidelines

When using multiple bit logic devices, inputs should never float. In many cases, functions or parts of functions of

digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only

three of the four buffer gates are used. Such input pins should not be left unconnected because the undefined

voltages at the outside connections result in undefined operational states. All unused inputs of digital logic

devices must be connected to a high or low bias to prevent them from floating. The logic level that should be

applied to any particular unused input depends on the function of the device. Generally they will be tied to GND

part is a transceiver.

11.2 Layout Example

Figure 7. Layout Recommendation

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