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SPP20N60S5 データシート(PDF) 3 Page - Infineon Technologies AG |
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SPP20N60S5 データシート(HTML) 3 Page - Infineon Technologies AG |
3 / 11 page 2004-03-30 Rev. 2.1 Page 3 SPP20N60S5 SPB20N60S5 Electrical Characteristics , at T j = 25 °C, unless otherwise specified Parameter Symbol Conditions Values Unit min. typ. max. Characteristics Transconductance gfs VDS≥2*ID*RDS(on)max, ID=13A - 12 - S Input capacitance Ciss VGS=0V, VDS=25V, f =1MHz - 3000 - pF Output capacitance Coss - 1170 - Reverse transfer capacitance Crss - 28 - Effective output capacitance,3) energy related Co(er) VGS=0V, VDS=0V to 480V - 83 - pF Effective output capacitance,4) time related Co(tr) - 160 - Turn-on delay time td(on) VDD=350V, VGS=0/10V, ID=20A, RG=5.7Ω - 120 - ns Rise time tr - 25 - Turn-off delay time td(off) - 140 210 Fall time tf - 30 45 Gate Charge Characteristics Gate to source charge Qgs VDD=350V, ID=20A - 21 - nC Gate to drain charge Qgd - 47 - Gate charge total Qg VDD=350V, ID=20A, VGS=0 to 10V - 79 103 Gate plateau voltage V(plateau) VDD=350V, ID=20A - 8 - V 1Repetitve avalanche causes additional power losses that can be calculated asPAV=EAR*f. 2Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain connection. PCB is vertical without blown air. 3Co(er) is a fixed capacitance that gives the same stored energy asCoss while VDS is rising from 0 to 80% VDSS. 4Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. |
同様の部品番号 - SPP20N60S5 |
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同様の説明 - SPP20N60S5 |
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