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LM1229 データシート(PDF) 8 Page - Texas Instruments

部品番号 LM1229
部品情報  Compatible CMOS TV RGB and Deflection Processor
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ホームページ  http://www.ti.com
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LM1229 データシート(HTML) 8 Page - Texas Instruments

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OBSOLETE
LM1229
SNOSAH0D – MARCH 2005 – REVISED APRIL 2013
www.ti.com
System Interface Signal Characteristics
Unless otherwise noted: TA = 25°C, VCC = +5.0V, VIN = 0.7V, VABL = VCC, CL = 10 pF, Video Outputs = 2.4 VP-P
(1) (2)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VSPOT
Spot Killer Voltage
VCC Adjusted to Activate
(3)
4.0
V
VREF
VREF output voltage (pin 2)
1.2
V
VIL
Logic low input voltage
−0.5
1.5
V
(SCL, SDA, HSYNC, VSYNC)
VIH
Logic high input voltage
3.0
VCC + 0.5
V
(SCL, SDA, HSYNC, VSYNC)
IL
Logic low input current
SDA or SCL, Input Voltage = 0V
±10
µA
(SCL, SDA, HSYNC, VSYNC)
IH
Logic high input current
SDA or SCL, Input Voltage = 5.0V
±10
µA
(SCL, SDA, HSYNC, VSYNC)
VOL
Logic low output voltage (SCL, SDA)
IO = 3 mA
0.5
V
IFB THRESHOLD
IIN blank detection threshold (pin 24)
−20
µA
IFB IN MAX
Absolute maximum current during
Flyback input
5
mA
flyback
IFB IN MAX
Peak flyback input current
Design value - AC coupled
1.0
mA
IFB OUT MAX
Flyback input current
Absolute maximum during scan
−500
µA
tH-BLANK ON
+ Zero crossing of IFB to 50% of
Blanking time delay - on
50
ns
output blanking start. IFB = +1.5 mA
tH-BLANK OFF
− Zero crossing of IFB to 50% of
Blanking time delay - off
50
ns
output blanking end. IFB = −100 µA
VBLANK MAX
CONTRAST[6:0], RGAIN[6:0],
GGAIN[6:0], BGAIN[6:0] = 0x7F,
Maximum video blanking level
0
0.25
V
BRIGHTNESS[7:0] = 0x00,
OFFSET[3:0] = 0xC, AC input signal
tPW CLAMP
Minimum clamp pulse width
See(4)
200
ns
VCLAMP MAX
Maximum low level clamp voltage
To ensure low state
1.0
V
VCLAMP MIN
Minimum high level clamp voltage
To ensure high state
3.0
V
ICLAMP LOW
Clamp gate low input current
V23 = 0V
−0.4
µA
ICLAMP HIGH
Clamp gate high input current
V23 = 5.0V
0.4
µA
tCLAMP-VIDEO
Minimum wait from end of clamp pulse
Referenced to RGB video inputs
50
ns
to start of video
VHEHT-LOW
Low limit of pin 20 HEHT input
1.4
V
VHEHT-HIGH
High limit of pin 20 HEHT input
3.4
V
VVEHT1-LOW,
Low limit of pins 8 and 9 VEHT inputs
1
V
VVEHT2-LOW
VVEHT1-HIGH,
High limit of pins 8 and 9 VEHT inputs
4
V
VVEHT2-HIGH
(1)
Datasheet min/max specification limits are specified by design, test, or statistical analysis. The ensured specifications apply only for the
test conditions listed. Some performance characteristics may change when the device is not operated under the listed test conditions.
(2)
Typical specifications are specified at +25°C and represent the most likely parametric norm.
(3)
Once the spot killer has been activated, the LM1229 remains in the off state until VCC is cycled (reduced below 0.5V and then restored
to 5V).
(4)
A minimum pulse width of 200 ns is the specified minimum for a horizontal line of 15 kHz. This limit is ensured by design. If a lower line
rate is used then a longer clamp pulse may be required.
8
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Product Folder Links: LM1229


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