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AD6674-500EBZ データシート(PDF) 2 Page - Analog Devices |
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AD6674-500EBZ データシート(HTML) 2 Page - Analog Devices |
2 / 91 page AD6674 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 3 Product Highlights ........................................................................... 4 Specifications..................................................................................... 5 DC Specifications ......................................................................... 5 AC Specifications.......................................................................... 6 Digital Specifications ................................................................... 8 Switching Specifications .............................................................. 9 Timing Specifications .................................................................. 9 Absolute Maximum Ratings.......................................................... 11 Thermal Characteristics ............................................................ 11 ESD Caution................................................................................ 11 Pin Configuration and Function Descriptions........................... 12 Typical Performance Characteristics ........................................... 14 AD6674-1000.............................................................................. 14 AD6674-750 ................................................................................ 17 AD6674-500 ................................................................................ 20 Equivalent Circuits......................................................................... 23 Theory of Operation ...................................................................... 25 ADC Architecture ...................................................................... 25 Analog Input Considerations.................................................... 25 Voltage Reference ....................................................................... 30 Clock Input Considerations...................................................... 31 Power-Down/Standby Mode..................................................... 32 Temperature Diode .................................................................... 32 ADC Overrange and Fast Detect.................................................. 33 ADC Overrange (OR)................................................................ 33 Fast Threshold Detection (FD_A and FD_B) ........................ 33 Signal Monitor ................................................................................ 34 SPORT over JESD204B.............................................................. 34 Digital Downconverter (DDC)..................................................... 37 DDC I/Q Input Selection .......................................................... 37 DDC I/Q Output Selection ....................................................... 37 DDC General Description ........................................................ 37 Frequency Translation ................................................................... 43 General Description................................................................... 43 DDC NCO + Mixer Loss and SFDR........................................ 44 Numerically Controlled Oscillator .......................................... 44 FIR Filters ........................................................................................ 46 General Description................................................................... 46 Half-Band Filters ........................................................................ 47 DDC Gain Stage ......................................................................... 48 DDC Complex to Real Conversion ......................................... 48 DDC Example Configurations ................................................. 49 Noise Shaping Requantizer (NSR) ............................................... 53 Decimating Half-Band Filter .................................................... 53 NSR Overview ............................................................................ 53 Variable Dynamic Range (VDR).................................................. 56 VDR Real Mode.......................................................................... 57 VDR Complex Mode ................................................................. 57 Digital Outputs ............................................................................... 59 Introduction to JESD204B Interface........................................ 59 JESD204B Overview .................................................................. 59 Functional Overview ................................................................. 60 JESD204B Link Establishment ................................................. 60 Physical Layer (Driver) Outputs .............................................. 62 JESD204B Tx Converter Mapping........................................... 64 Configuring the JESD204B Link.............................................. 64 Multichip Synchronization............................................................ 68 SYSREF± Setup/Hold Window Monitor................................. 70 Test Modes....................................................................................... 72 ADC Test Modes ........................................................................ 72 JESD204B Block Test Modes .................................................... 72 Serial Port Interface (SPI).............................................................. 75 Configuration Using the SPI..................................................... 75 Hardware Interface..................................................................... 75 SPI Accessible Features.............................................................. 75 Memory Map .................................................................................. 76 Reading the Memory Map Register Table............................... 76 Memory Map Register Table..................................................... 77 Applications Information .............................................................. 90 Power Supply Recommendations............................................. 90 Exposed Pad Thermal Heat Slug Recommendations............ 90 AVDD1_SR (Pin 57) and AGND (Pin 56, Pin 60) ................ 90 Outline Dimensions....................................................................... 91 Ordering Guide .......................................................................... 91 Rev. B | Page 2 of 91 |
同様の部品番号 - AD6674-500EBZ |
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同様の説明 - AD6674-500EBZ |
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