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AD8450ASTZ データシート(PDF) 1 Page - Analog Devices |
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AD8450ASTZ データシート(HTML) 1 Page - Analog Devices |
1 / 41 page Precision Analog Front End and Controller for Battery Test/Formation Systems Data Sheet AD8450 Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014–2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Integrated constant current and voltage modes with automatic switchover Charge and discharge modes Precision voltage and current measurement Integrated precision control feedback blocks Precision interface to PWM or linear power converters Programmable gain settings Current sense gains: 26, 66, 133, and 200 Voltage sense gains: 0.2, 0.27, 0.4, and 0.8 Programmable OVP and OCP fault detection Current sharing and balancing Excellent ac and dc performance Maximum offset voltage drift: 0.6 µV/°C Maximum gain drift: 3 ppm/°C Low current sense amplifier input voltage noise: ≤9 nV/√Hz Current sense CMRR: 126 dB minimum (gain = 200) TTL compliant logic APPLICATIONS Battery cell formation and testing Battery module testing GENERAL DESCRIPTION The AD8450 is a precision analog front end and controller for testing and monitoring battery cells. A precision programmable gain instrumentation amplifier (PGIA) measures the battery charge/discharge current, and a programmable gain difference amplifier (PGDA) measures the battery voltage (see Figure 1). Internal laser trimmed resistor networks set the gains for the PGIA and the PGDA, optimizing the performance of the AD8450 over the rated temperature range. PGIA gains are 26, 66, 133, and 200. PGDA gains are 0.2, 0.27, 0.4, and 0.8. Voltages at the ISET and VSET inputs set the desired constant current (CC) and constant voltage (CV) values. CC to CV switching is automatic and transparent to the system. A TTL logic level input, MODE, selects the charge or discharge mode (high for charge, low for discharge). An analog output, VCTRL, interfaces directly with the Analog Devices, Inc., ADP1972 PWM controller. The AD8450 includes resistor programmable overvoltage and overcurrent detection and current sharing circuitry. Current sharing is used to balance the output current of multiple bridged channels. The AD8450 simplifies designs by providing excellent accuracy, performance over temperature, flexibility with functionality, and overall reliability in a space-saving package. The AD8450 is available in an 80-lead, 14 mm × 14 mm × 1 mm LQFP package and is rated for an operating temperature of −40°C to +85°C. FUNCTIONAL BLOCK DIAGRAM CURRENT SENSE PGIA VOLTAGE SENSE PGDA ISMEA ISET BVMEA VSET VINT FAULT ISVN ISVP BVNx BVPx VINT VCTRL 1× MODE AD8450 IVE0/ IVE1 VVE0/ VVE1 OVPS/ OVPR OCPS/ OCPR IMAX CSH VVP0 VSETBF VCLP VCLN BVREFH/ BVREFL ISREFH/ ISREFL VREF CURRENT SHARING VOLTAGE REFERENCE FAULT DETECTION CONSTANT VOLTAGE LOOP FILTER CONSTANT CURRENT LOOP FILTER (CHARGE/ DISCHARGE) SWITCHING GAIN NETWORK AND MUX GAIN NETWORK 26, 66, 133, 200 0.2, 0.27, 0.4, 0.8 Figure 1. |
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同様の説明 - AD8450ASTZ |
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