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DM54LS283J データシート(PDF) 1 Page - National Semiconductor (TI) |
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DM54LS283J データシート(HTML) 1 Page - National Semiconductor (TI) |
1 / 8 page TLF6421 June 1989 54LS283DM54LS283DM74LS283 4-Bit Binary Adders with Fast Carry General Description These full adders perform the addition of two 4-bit binary numbers The sum (R) outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bit These adders feature full internal look ahead across all four bits This provides the system designer with partial look- ahead performance at the economy and reduced package count of a ripple-carry implementation The adder logic including the carry is implemented in its true form meaning that the end-around carry can be accom- plished without the need for logic or level inversion Features Y Full-carry look-ahead across the four bits Y Systems achieve partial look-ahead performance with the economy of ripple carry Y Typical add times Two 8-bit words 25 ns Two 16-bit words 45 ns Y Typical power dissipation per 4-bit adder 95 mW Y Alternate MilitaryAerospace device (54LS283) is avail- able Contact a National Semiconductor Sales Office Distributor for specifications Connection Diagram Dual-In-Line Package TLF6421 – 1 Order Number 54LS283DMQB 54LS283FMQB 54LS283LMQB DM54LS283J DM54LS283W DM74LS283M or DM74LS283N See NS Package Number E20A J16A M16A N16E or W16A C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
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同様の説明 - DM54LS283J |
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