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TPS71715QDRVRQ1 データシート(PDF) 5 Page - Texas Instruments |
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TPS71715QDRVRQ1 データシート(HTML) 5 Page - Texas Instruments |
5 / 35 page 5 TPS717-Q1 www.ti.com SLVSBM4C – SEPTEMBER 2012 – REVISED JANUARY 2016 Product Folder Links: TPS717-Q1 Submit Documentation Feedback Copyright © 2012–2016, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) VEN absolute maximum rating is VIN + 0.3 V or 7 V, whichever is greater. 6 Specifications 6.1 Absolute Maximum Ratings over operating temperature range (unless otherwise noted), all voltages are with respect to GND (1) MIN MAX UNIT Voltage VIN –0.3 7 V VFB –0.3 3.6 VNR –0.3 3.6 VEN –0.3 VIN + 0.3 V (2) VOUT –0.3 7 Current IOUT Internally limited A Continuous total power dissipation PDISS See Thermal Information table Ambient temperature TA –40 125 °C Operating junction temperature TJ –55 150 °C Storage temperature Tstg –55 150 °C (1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002(1) ±2000 V TPS717-Q1 in DCK and DSE packages V(ESD) Electrostatic discharge Charged device model (CDM), per AEC Q100-011 All pins ±750 V Corner pins, DCK (1, 3, 4, and 5) ±750 Corner pins, DSE (1, 3, 4, and 6) ±750 TPS717-Q1 in DRV package V(ESD) Electrostatic discharge Charged device model (CDM), per AEC Q100-011 All pins ±500 V Corner pins (1, 3, 4, and 6) ±750 |
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同様の説明 - TPS71715QDRVRQ1 |
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