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TPS71733DRVTG4 データシート(PDF) 2 Page - Texas Instruments

部品番号 TPS71733DRVTG4
部品情報  Low-Noise, High-Bandwidth PSRR, Low-Dropout, 150-mA Linear Regulator
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
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TPS71733DRVTG4 データシート(HTML) 2 Page - Texas Instruments

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TPS717
SBVS068I – FEBRUARY 2006 – REVISED JANUARY 2016
www.ti.com
Product Folder Links: TPS717
Submit Documentation Feedback
Copyright © 2006–2016, Texas Instruments Incorporated
Table of Contents
1
Features .................................................................. 1
2
Applications ........................................................... 1
3
Description ............................................................. 1
4
Revision History..................................................... 2
5
Pin Configuration and Functions ......................... 4
6
Specifications......................................................... 5
6.1
Absolute Maximum Ratings ...................................... 5
6.2
ESD Ratings ............................................................ 5
6.3
Recommended Operating Conditions ....................... 5
6.4
Thermal Information .................................................. 5
6.5
Electrical Characteristics........................................... 6
6.6
Typical Characteristics .............................................. 7
7
Detailed Description ............................................ 12
7.1
Overview ................................................................. 12
7.2
Functional Block Diagrams ..................................... 12
7.3
Feature Description................................................. 13
7.4
Device Functional Modes........................................ 14
8
Application and Implementation ........................ 16
8.1
Application Information............................................ 16
8.2
Typical Applications ................................................ 17
8.3
Do's and Don'ts ...................................................... 19
9
Power Supply Recommendations ...................... 19
10
Layout................................................................... 20
10.1
Layout Guidelines ................................................. 20
10.2
Layout Examples................................................... 20
10.3
Power Dissipation ................................................ 21
11
Device and Documentation Support ................. 23
11.1
Device Support .................................................... 23
11.2
Documentation Support ....................................... 23
11.3
Community Resources.......................................... 23
11.4
Trademarks ........................................................... 24
11.5
Electrostatic Discharge Caution ............................ 24
11.6
Glossary ................................................................ 24
12
Mechanical, Packaging, and Orderable
Information ........................................................... 24
4 Revision History
Changes from Revision H (January 2015) to Revision I
Page
Added TI Design .................................................................................................................................................................... 1
Changed PMOSFET to PMOS in Description section ........................................................................................................... 1
Added footnote to the Recommended Operating Conditions table ........................................................................................ 5
Changed VFB parameter in Electrical Characteristics table ................................................................................................... 6
Changed units of Vn parameter in Electrical Characteristics table ......................................................................................... 6
Deleted UVLO parameter minimum specification from Electrical Characteristics table ......................................................... 6
Changed TA to TJ in x-axis of Figure 7, Figure 10, and Figure 11 ........................................................................................ 8
Changed second paragraph of Startup and Noise Reduction Capacitor section................................................................. 13
Changed last bullet in Normal Operation section ................................................................................................................ 14
Changed value of the TJ column in last row of Table 1 ...................................................................................................... 15
Added last sentence to Input and Output Capacitor Requirements section......................................................................... 16
Changed VREF to VFB in Equation 3 ..................................................................................................................................... 17
Changed definition of z in Table 4 ....................................................................................................................................... 23


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