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DAC128S085CISQX データシート(PDF) 9 Page - Texas Instruments |
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DAC128S085CISQX データシート(HTML) 9 Page - Texas Instruments |
9 / 35 page DAC128S085 www.ti.com SNAS407H – AUGUST 2007 – REVISED APRIL 2015 Electrical Characteristics (continued) The following specifications apply for VA = 2.7 V to 5.5 V, VREF1 = VREF2 = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. All limits are at TA = 25°C, unless otherwise specified. PARAMETER TEST CONDITIONS MIN(1) TYP MAX(1) UNIT VA = 2.7 V to 0.6 3.6 V µW TMIN ≤ TA ≤ fSCLK = 30 MHz, 5.4 TMAX SYNC = VA and DIN = 0V after PD VA = 4.5V to 2.5 mode loaded 5.5V µW TMIN ≤ TA ≤ 16.5 Total Power Consumption in TMAX PPD all PD Modes, VA = 2.7 V to (2) 0.3 3.6 V µW TMIN ≤ TA ≤ fSCLK = 0, SYNC = 3.6 TMAX VA and DIN = 0V after PD mode VA = 4.5 V to 1 loaded 5.5 V µW TMIN ≤ TA ≤ 11 TMAX 7.6 AC and Timing Characteristics The following specifications apply for VA = 2.7 V to 5.5 V, VREF1,2 = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. All limits are at TA = 25°C, unless otherwise specified. MIN(1) NOM MAX(1) UNIT 40 fSCLK SCLK Frequency MHz TMIN ≤ TA ≤ TMAX 30 400h to C00h code change 6 Output Voltage Settling Time RL = 2 kΩ, CL = 200 pF ts µs (2) TMIN ≤ TA ≤ TMAX 8.5 SR Output Slew Rate 1 V/µs GI Glitch Impulse Code change from 800h to 7FFh 40 nV-sec DF Digital Feedthrough 0.5 nV-sec DC Digital Crosstalk 0.5 nV-sec CROSS DAC-to-DAC Crosstalk 1 nV-sec MBW Multiplying Bandwidth VREF1,2 = 2.5 V ± 2 Vpp 360 kHz Total Harmonic Distortion Plus VREF1,2 = 2.5 V ± 0.5 Vpp THD+N −80 dB Noise 100 Hz < fIN < 20 kHz ONSD Output Noise Spectral Density DAC Code = 800 h, 10 kHz 40 nV/sqrt (Hz) ON Output Noise BW = 30 kHz 14 µV VA = 3 V 3 µsec tWU Wake-Up Time VA = 5 V 20 µsec 25 1/fSCLK SCLK Cycle Time. See Figure 1 ns TMIN ≤ TA ≤ TMAX 33 7 tCH SCLK High time. See Figure 1 ns TMIN ≤ TA ≤ TMAX 10 7 tCL SCLK Low Time. See Figure 1 ns TMIN ≤ TA ≤ TMAX 10 3 1 / fSCLK - 3 SYNC Set-up Time prior to tSS ns SCLK Falling Edge. See Figure 1 T MIN ≤ TA ≤ TMAX 10 (1) Test limits are ensured to TI's AOQL (Average Outgoing Quality Level). (2) This parameter is ensured by design and/or characterization and is not tested in production. Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: DAC128S085 |
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