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DAC1007 データシート(PDF) 7 Page - National Semiconductor (TI) |
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DAC1007 データシート(HTML) 7 Page - National Semiconductor (TI) |
7 / 22 page Settling Time Settling time is the time required from a code transition until the DAC output reaches within g LSB of the final output value Full-scale settling time requires a zero to full-scale or full-scale to zero output change Full-Scale Error Full scale error is a measure of the output error between an ideal DAC and the actual device output Ideally for the DAC1006 series full-scale is VREFb1 LSB For VREFeb10V and unipolar operation VFULL-SCA- LE e 100000V b98mVe99902V Full-scale error is adjust- able to zero Monotonicity If the output of a DAC increases for increas- ing digital input code then the DAC is monotonic A 10-bit DAC with 10-bit monotonicity will produce an increasing an- alog output when all 10 digital inputs are exercised A 10-bit DAC with 9-bit monotonicity will be monotonic when only the most significant 9 bits are exercised Similarly 8-bit monotonicity is guaranteed when only the most significant 8 bits are exercised 20 DOUBLE BUFFERING These DACs are double-buffered microprocessor compati- ble versions of the DAC1020 10-bit multiplying DAC The addition of the buffers for the digital input data not only al- lows for storage of this data but also provides a way to assemble the 10-bit input data word from two write cycles when using an 8-bit data bus Thus the next data update for the DAC output can be made with the complete new set of 10-bit data Further the double buffering allows many DACs in a system to store current data and also the next data The updating of the new data for each DAC is also not time critical When all DACs are updated a common strobe sig- nal can then be used to cause all DACs to switch to their new analog output levels 30 TTL COMPATIBLE LOGIC INPUTS To guarantee TTL voltage compatibility of the logic inputs a novel bipolar (NPN) regulator circuit is used This makes the input logic thresholds equal to the forward drop of two di- odes (and also matches the temperature variation) as oc- curs naturally in TTL The basic circuit is shown in Figure 1 A curve of digital input threshold as a function of power supply voltage is shown in the Typical Performance Charac- teristics section 40 APPLICATION HINTS The DC stability of the VREF source is the most important factor to maintain accuracy of the DAC over time and tem- perature changes A good single point ground for the analog signals is next in importance These MICRO-DAC converters are CMOS products and reasonable care should be exercised in handling them prior to final mounting on a PC board The digital inputs are pro- tected but permanent damage may occur if the part is sub- jected to high electrostatic fields Store unused parts in con- ductive foam or anti-static rails 41 Power Supply Sequencing Decoupling Some IC amplifiers draw excessive current from the Analog inputs to Vb when the supplies are first turned on To pre- vent damage to the DAC an external Schottky diode con- nected from IOUT1 or IOUT2 to ground may be required to prevent destructive currents in IOUT1 or IOUT2 If an LM741 or LF356 is used these diodes are not required The standard power supply decoupling capacitors which are used for the op amp are adequate for the DAC TLH5688 – 9 FIGURE 1 Basic Logic Threshold Loop 7 |
同様の部品番号 - DAC1007 |
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同様の説明 - DAC1007 |
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