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SN74ALVCH16841DGGR データシート(PDF) 3 Page - Texas Instruments

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部品番号 SN74ALVCH16841DGGR
部品情報  20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS
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1OE
To Nine Other Channels
1
56
55
2
1LE
1D1
C1
1D
1Q1
2OE
To Nine Other Channels
28
29
42
15
2LE
2D1
C1
1D
2Q1
ABSOLUTE MAXIMUM RATINGS
(1)
SN74ALVCH16841
20-BIT BUS-INTERFACE D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCES043E – JULY 1995 – REVISED SEPTEMBER 2004
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
-0.5
4.6
V
VI
Input voltage range(2)
-0.5
4.6
V
VO
Output voltage range(2)(3)
-0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
-50
mA
IOK
Output clamp current
VO < 0
-50
mA
IO
Continuous output current
±50
mA
Continuous current through each VCC or GND
±100
mA
DGG package
81
θ
JA
Package thermal impedance(4)
°C/W
DL package
74
Tstg
Storage temperature range
-65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
This value is limited to 4.6 V maximum.
(4)
The package thermal impedance is calculated in accordance with JESD 51.
3


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