データシートサーチシステム |
|
DAC101C085 データシート(PDF) 4 Page - Texas Instruments |
|
|
DAC101C085 データシート(HTML) 4 Page - Texas Instruments |
4 / 40 page Snap Back GND D1 PIN Snap Back GND D1 PIN V+ 2.1k 41.5k 41.5k ADR1 SDA ADR0 VA GND VSSOP 1 2 4 7 8 3 SCL 6 5 VREF VOUT DAC101C085 ADR0 SCL SDA VOUT VA GND SOT 1 2 3 5 4 6 DAC101C081 ADR0 SCL SDA VOUT VA GND WSON 1 2 3 5 4 6 DAC101C081 4 DAC101C081, DAC101C081Q, DAC101C085 SNVS801B – APRIL 2012 – REVISED JANUARY 2016 www.ti.com Product Folder Links: DAC101C081 DAC101C081Q DAC101C085 Submit Documentation Feedback Copyright © 2012–2016, Texas Instruments Incorporated 7 Pin Configuration and Functions NGF Package 6-Pin WSON Top View DDC Package 6-Lead SOT Top View DGK Package 8-Lead VSSOP Top View Pin Functions PIN TYPE EQUIVALENT CIRCUIT DESCRIPTION NAME WSON SOT VSSOP ADR0 1 6 1 Digital Input, three levels Tri-state Address Selection Input. Sets the two Least Significant Bits (A1 and A0) of the 7-bit slave address. (see Table 1) ADR1 — — 2 Digital Input, three levels Tri-State Address Selection Input. Sets Bits A6 and A3 of the 7-bit slave address. (see Table 1) GND 4 3 5 Ground Ground for all on-chip circuitry PAD PAD — — Ground Exposed die attach pad can be connected to ground or left floating. Soldering the pad to the PCB offers optimal thermal performance and enhances package self-alignment during reflow. SCL 2 5 3 Digital Input Serial Clock Input. SCL is used together with SDA to control the transfer of data in and out of the device. SDA 3 4 4 Digital Input/Output Serial Data bi-directional connection. Data is clocked into or out of the internal 16-bit register relative to the clock edges of SCL. This is an open drain data line that must be pulled to the supply (VA) by an external pullup resistor. VA 5 2 6 Supply Power supply input. For the SOT and WSON versions, this supply is used as the reference. Must be decoupled to GND. VOUT 6 1 8 Analog Output Analog Output Voltage VREF — — 7 Supply Unbufferred reference voltage. For the VSSOP-8, this supply is used as the reference. VREF must be free of noise and decoupled to GND. |
同様の部品番号 - DAC101C085 |
|
同様の説明 - DAC101C085 |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |