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DAC8801IDGKT データシート(PDF) 8 Page - Texas Instruments |
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DAC8801IDGKT データシート(HTML) 8 Page - Texas Instruments |
8 / 22 page www.ti.com THEORY OF OPERATION V OUT + −VREF CODE 16384 (1) VREF GND IOUT 2R 2R 2R 2R 2R 2R 2R 2R 2R 2R 2R 2R RFB R R R _ + OPA277 V+ V− 15 V −15 V VO VDD RFB IOUT GND DAC8801 U2 U1 VDD VREF DAC8801 SLAS403B – NOVEMBER 2004 – REVISED FEBRUARY 2007 The DAC8801 is a single channel current output, 16-bit digital-to-analog converter (DAC). The architecture, illustrated in Figure 17, is an R-2R ladder configuration with the three MSBs segmented. Each 2R leg of the ladder is either switched to GND or the IOUT terminal. The IOUT terminal of the DAC is held at a virtual GND potential by the use of an external I/V converter op amp. The R-2R ladder is connected to an external reference input VREF that determines the DAC full-scale current. The R-2R ladder presents a code independent load impedance to the external reference of 5 k Ω± 25%. The external reference voltage can vary in a range of -10 V to 10 V, thus providing bipolar IOUT current operation. By using an external I/V converter and the DAC8801 RFB resistor, output voltage ranges of -VREF to VREF can be generated. When using an external I/V converter and the DAC8801 RFB resistor, the DAC output voltage is given by Equation 1: Figure 17. Equivalent R-2R DAC Circuit Each DAC code determines the 2R leg switch position to either GND or IOUT. Because the DAC output impedance as seen looking into the IOUT terminal changes versus code, the external I/V converter noise gain will also change. Because of this, the external I/V converter op amp must have a sufficiently low offset voltage such that the amplifier offset is not modulated by the DAC IOUT terminal impedance change. External op amps with large offset voltages can produce INL errors in the transfer function of the DAC8801 due to offset modulation versus DAC code. For best linearity performance of the DAC8801, an op amp (OPA277) as shown in Figure 18 is recommended. This circuit allows VREF to swing from -10V to +10V. Figure 18. Voltage Output Configuration 8 Submit Documentation Feedback |
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